191 0

Full metadata record

DC FieldValueLanguage
dc.contributor.author임동진-
dc.date.accessioned2021-01-20T04:49:25Z-
dc.date.available2021-01-20T04:49:25Z-
dc.date.issued2002-04-
dc.identifier.citation전기학회논문지 D, v. 51D, no. 4, page. 144-151en_US
dc.identifier.issn1229-6287-
dc.identifier.urihttp://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01256073-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/157209-
dc.description.abstractThis paper presents a fault-tolerant duplex architecture to build a high-reliability microcontroller using commercial VLSI processors. The architecture supports fail-silence under all single-failure situations and facilitates recovery from transient failures. The paper implements the duplex architecture using two Motorola MC68360 processors and evaluates its fault tolerance in a real application environment.en_US
dc.description.sponsorship본 연구는 한국과학재단 목적기초연구(과제번호: 97-0100-1101-3)지원으로 수행되었음.en_US
dc.language.isoko_KRen_US
dc.publisher대한전기학회en_US
dc.subjectMicrocontrolleren_US
dc.subjectFault Toleranceen_US
dc.subjectDuplexen_US
dc.subjectLock-Stepen_US
dc.title결함내성형 이중 마이크로콘트롤러 구조en_US
dc.title.alternativeA Fault-Tolerant Duplex Microcontroller Architectureen_US
dc.typeArticleen_US
dc.relation.journal전기학회논문지(A,B,C,D)-
dc.contributor.googleauthor김병진-
dc.contributor.googleauthor백승수-
dc.contributor.googleauthor이인환-
dc.contributor.googleauthor임동진-
dc.relation.code2012101073-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidlimdj-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE