Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 임동진 | - |
dc.date.accessioned | 2021-01-20T04:49:25Z | - |
dc.date.available | 2021-01-20T04:49:25Z | - |
dc.date.issued | 2002-04 | - |
dc.identifier.citation | 전기학회논문지 D, v. 51D, no. 4, page. 144-151 | en_US |
dc.identifier.issn | 1229-6287 | - |
dc.identifier.uri | http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01256073 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/157209 | - |
dc.description.abstract | This paper presents a fault-tolerant duplex architecture to build a high-reliability microcontroller using commercial VLSI processors. The architecture supports fail-silence under all single-failure situations and facilitates recovery from transient failures. The paper implements the duplex architecture using two Motorola MC68360 processors and evaluates its fault tolerance in a real application environment. | en_US |
dc.description.sponsorship | 본 연구는 한국과학재단 목적기초연구(과제번호: 97-0100-1101-3)지원으로 수행되었음. | en_US |
dc.language.iso | ko_KR | en_US |
dc.publisher | 대한전기학회 | en_US |
dc.subject | Microcontroller | en_US |
dc.subject | Fault Tolerance | en_US |
dc.subject | Duplex | en_US |
dc.subject | Lock-Step | en_US |
dc.title | 결함내성형 이중 마이크로콘트롤러 구조 | en_US |
dc.title.alternative | A Fault-Tolerant Duplex Microcontroller Architecture | en_US |
dc.type | Article | en_US |
dc.relation.journal | 전기학회논문지(A,B,C,D) | - |
dc.contributor.googleauthor | 김병진 | - |
dc.contributor.googleauthor | 백승수 | - |
dc.contributor.googleauthor | 이인환 | - |
dc.contributor.googleauthor | 임동진 | - |
dc.relation.code | 2012101073 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | limdj | - |
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