Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 최창환 | - |
dc.date.accessioned | 2020-10-08T07:08:20Z | - |
dc.date.available | 2020-10-08T07:08:20Z | - |
dc.date.issued | 2019-10 | - |
dc.identifier.citation | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v. 19, no. 10, Page. 6131-6134 | en_US |
dc.identifier.issn | 1533-4880 | - |
dc.identifier.issn | 1533-4899 | - |
dc.identifier.uri | https://www.ingentaconnect.com/content/asp/jnn/2019/00000019/00000010/art00024 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/154489 | - |
dc.description.abstract | The positive bias temperature instability (PBTI) characteristics of fully depleted silicon on insulator (FD-SOI) tunneling field effect transistor (TFET) are investigated in comparison with those of metal oxide semiconductor field effect transistor (MOSFET) fabricated with the same technology process. Unlike some of the previously reported studies, in which the PBTI lifetime of TFET is much longer than that of MOSFET, in this study, the PBTI lifetime of TFET is found to be shorter than that of MOSFET. This result is very interesting, because degradation of electrical parameters of TFET is mainly affected by local traps near the source junction rather than global traps in the channel region. Large degradation of the electrical parameters of TFET due to PBTI stress would result from large fluctuation of the vertical electric field caused by traps near the source junction. This electric field fluctuation near the local region in TFET has more impact on electrical parameter degradation than channel conductivity fluctuation in MOSFET. Therefore, to improve the reliability characteristics of TFET, evaluation of PBTI characteristics and improvement of the quality of gate oxide near the source junction are essential. | en_US |
dc.description.sponsorship | This research was supported by the Ministry of Trade, Industry and Energy (MOTIE) (10067808) and the Korea Semiconductor Research Consortium (KSRC) support program for the development of future semiconductor devices. It was also supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT and Future Planning (NRF-2015M3A7B7045563). | en_US |
dc.language.iso | en | en_US |
dc.publisher | AMER SCIENTIFIC PUBLISHERS | en_US |
dc.subject | TFET | en_US |
dc.subject | PBTI | en_US |
dc.subject | FD-SOI | en_US |
dc.subject | Local Trap | en_US |
dc.subject | Reliability | en_US |
dc.title | Investigation of Positive Bias Temperature Instability Characteristics of Fully Depleted Silicon on Insulator Tunneling Field Effect Transistor with High-k Dielectric Gate Stacks | en_US |
dc.type | Article | en_US |
dc.relation.no | 10 | - |
dc.relation.volume | 19 | - |
dc.identifier.doi | 10.1166/jnn.2019.16992 | - |
dc.relation.page | 6131-6134 | - |
dc.relation.journal | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.contributor.googleauthor | Song, Hyeong-Sub | - |
dc.contributor.googleauthor | Kim, So-Yeong | - |
dc.contributor.googleauthor | Lim, Dong-Hwan | - |
dc.contributor.googleauthor | Kwon, Sung-Kyu | - |
dc.contributor.googleauthor | Choi, Chang-Hwan | - |
dc.contributor.googleauthor | Lee, Ga-Won | - |
dc.contributor.googleauthor | Lee, Hi-Deok | - |
dc.relation.code | 2019037685 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DIVISION OF MATERIALS SCIENCE AND ENGINEERING | - |
dc.identifier.pid | cchoi | - |
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