High-density three-dimensional NAND flash memory devices with a vertical-stacked-array-transistor structure
- Title
- High-density three-dimensional NAND flash memory devices with a vertical-stacked-array-transistor structure
- Author
- 진준
- Advisor(s)
- 김태환
- Issue Date
- 2011-08
- Publisher
- 한양대학교
- Degree
- Master
- Abstract
- Three-dimensional NAND flash memory devices based on a vertical-stacked-array-transistor (VSAT) structure were designed to increase the memory density and the on-current level and to enhance the subthreshold swing (SS). The electrical characteristics for the proposed memory devices were investigated to verify the enhancement of device performance by using the TCAD simulation tool of Sentaurus. The memory density of the proposed memory device was increased by about 50 % in comparison with that of the memory device with a conventional VSAT structure. The simulation results showed that the on-current level and the SS for the proposed memory device were enhanced in comparison with those of the conventional memory device, resulting in an improvement of the sensing speed and the switching characteristics. The on-current level and the SS of the proposed memory devices were sufficiently enough for memory device operation, regardless of the number of active cell. The proposed memory devices could be operated as a multi-bit storage due to the sufficiently large amount of the threshold voltage shift of the proposed memory device.
- URI
- https://repository.hanyang.ac.kr/handle/20.500.11754/138431http://hanyang.dcollection.net/common/orgView/200000417260
- Appears in Collections:
- GRADUATE SCHOOL[S](대학원) > ELECTRONICS AND COMPUTER ENGINEERING(전자컴퓨터통신공학과) > Theses (Master)
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