Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 송윤흡 | - |
dc.contributor.author | 김경록 | - |
dc.date.accessioned | 2020-03-09T02:52:57Z | - |
dc.date.available | 2020-03-09T02:52:57Z | - |
dc.date.issued | 2013-02 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/134261 | - |
dc.identifier.uri | http://hanyang.dcollection.net/common/orgView/200000420803 | en_US |
dc.description.abstract | A bit-cost scalable (BiCS) technology using a bulk erasing method instead of the conventional erase operation using gate-induced drain leakage (GIDL) is proposed to realize better cell characteristics and process feasibility for three-dimensional (3D) NAND flash memory. A novel 3-dimensional (3-D) vertical stacked type NAND flash cell arrays using the bulk erase method is proposed. This cell arrays consist of has an additional electrode layer for a bulk erase operation in the middle of a vertical channel string cell and several rows of NAND string share control gates. We investigated the I-V characteristics of the bulk erasable-BiCS structure using 3-D TCAD simulation tool, rely on the P+ bulk electrode for high speed Program/Erase operation and good read current margin. Here, we confirmed that this novel cell technology provides better cell characteristics and process feasibility for the 3-D vertical stacked NAND flash cell arrays. Morever, junction (P+/P/P+) engineering is achieved to realize a P+ poly-crystalline silicon layer of the P+ flat plate type as a bulk electrode for better design feasibility. As a result, we expect that a bulk erasable-BiCS technology using a P+ flat plate type erase electrode can be a promising candidate tera-bit 3-dimensional vertical stacked NAND flash memory technology in the near future. | - |
dc.publisher | 한양대학교 | - |
dc.title | A Study on Erase Speed Enhancement of 3D Vertical NAND Flash Memories by using Bulk-Erasable Electrodes | - |
dc.type | Theses | - |
dc.contributor.googleauthor | 김경록 | - |
dc.contributor.alternativeauthor | Kim Kyeong-rok | - |
dc.sector.campus | S | - |
dc.sector.daehak | 대학원 | - |
dc.sector.department | 나노반도체공학과 | - |
dc.description.degree | Doctor | - |
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