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dc.contributor.author어영선-
dc.date.accessioned2020-03-02T07:22:21Z-
dc.date.available2020-03-02T07:22:21Z-
dc.date.issued2004-01-
dc.identifier.citation전자공학회논문지-SD, v. 41, No. 1, Page. 71-80en_US
dc.identifier.issn1229-6368-
dc.identifier.urihttp://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE01689939&language=ko_KR-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/132035-
dc.description.abstract본 논문에서는 집적회로 패키지에 기인한 노이즈를 해석할 수 있는 새로운 SSN모델을 보인다. 기존의 디커플링 커패시터를 고려하지 않은 회로모델은 과도하게 SSN을 예측한다는 것을 보였으며, 디커플링 커패시터가 포함된 패키지 회로모델을 통하여 새로운 SSN 모델을 제안하였다. 새롭게 제안된 SSN 모델은 공정(TSMC공정)을 사용하여 다양한 회로설계 변수(입력상승시간, 패키지 인덕턴스 및 동시 스위칭 개수)의 변화에 따라 HSPICE 시뮬레이션과 정확히(5% 이내에서) 일치한다는 것을 검증하였다. A new SSN(Simultaneous Switching Noise) model is presented, which can afford to investigate SSN due to integrated circuit package. It is shown that previous SSN models are not accurate enough to be practical since they do not take decoupling capacitor into account. In this paper, a new SSN model including the decoupling capacitor is developed. It is verified that the model has excellent agreement(within 5% error) with HSPICE simulation which employs TSMC CMOS process technology.en_US
dc.language.isoko_KRen_US
dc.publisher대한전자공학회en_US
dc.subjectSSNen_US
dc.subjectground bouncingen_US
dc.subjectdecoupling capacitanceen_US
dc.subjectsignal integrityen_US
dc.title디커플링 커패시터가 존재하는 파워/그라운드 라인의 SSN모델링en_US
dc.title.alternativeSSN(Simultaneous Switching Noise) Modeling of Power/Ground Lines with Decoupling Capacitoren_US
dc.typeArticleen_US
dc.relation.journal전자공학회논문지-
dc.contributor.googleauthor배성규-
dc.contributor.googleauthor어영선-
dc.contributor.googleauthor심종인-
dc.relation.code2012210989-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pideo-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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