Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 백상현 | - |
dc.date.accessioned | 2020-01-16T07:41:32Z | - |
dc.date.available | 2020-01-16T07:41:32Z | - |
dc.date.issued | 2019-08 | - |
dc.identifier.citation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v. 19, No. 4, Page. 388-395 | en_US |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.issn | 2233-4866 | - |
dc.identifier.uri | http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE08767118 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/121950 | - |
dc.description.abstract | In this paper, I/O timing margins are experimentally measured by DQS groups, for a DDR4 RDIMM with 2133 Mbps data rate, to study the margin effects of the special combination and sequence of random and fault-based deterministic data patterns. The most effective 94 data patterns are newly developed after experimentally investigating three test patterns factors, which consist of test algorithms, address directions, and data patterns; the most influential factor was data patterns, which resulted in the average margin reduction of 15.2%. The maximum of 11.8% margin was reduced by the proposed 94 patterns (in comparison to 28-bit PRBS pattern), which was from both selected PRBS and fault-based deterministic data patterns. | en_US |
dc.language.iso | ko_KR | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.subject | Programmable memory built-In selftest (PMBIST) margin test | en_US |
dc.subject | DDR4 I/O timing margins | en_US |
dc.subject | pseudo-random binary sequence(PRBS) | en_US |
dc.subject | interconnect fault model | en_US |
dc.subject | fault-critical-random-94 (FCR-94) data pattern (DP) set | en_US |
dc.title | Experimental Exploitation of Random and Deterministic Data Patterns for Stringent DDR4 I/O Timing Margins | en_US |
dc.type | Article | en_US |
dc.relation.no | 4 | - |
dc.relation.volume | 19 | - |
dc.identifier.doi | 10.5573/JSTS.2019.19.4.388 | - |
dc.relation.page | 388-395 | - |
dc.relation.journal | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.contributor.googleauthor | Lee, Kiseok | - |
dc.contributor.googleauthor | Li, Tan | - |
dc.contributor.googleauthor | Baeg, Sanghyeon | - |
dc.relation.code | 2019038164 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | bau | - |
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