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dc.contributor.author정재경-
dc.date.accessioned2019-12-07T21:14:22Z-
dc.date.available2019-12-07T21:14:22Z-
dc.date.issued2018-04-
dc.identifier.citationIEEE TRANSACTIONS ON ELECTRON DEVICES, v. 65, no. 4, page. 1383-1390en_US
dc.identifier.issn0018-9383-
dc.identifier.issn1557-9646-
dc.identifier.urihttps://ieeexplore.ieee.org/document/8305651-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/118485-
dc.description.abstractA thermally stable Ca-doped CuOx (CuCaOx) diffusion barrier to prevent the migration of Cu to amorphous InGaZnO (a-IGZO) was developed by reactive sputtering and subsequent annealing. Insertion of a 5-nm-thick CaCuOx between the Ca-dopedCu (CuCa) and a-IGZO channel films in the source/drain contact regions provided the resulting transistors with superior charge transport and lower trap density compared to the diffusion barrier-free CuCa/a-IGZO transistors. The fabricated a-IGZO transistors with the CuCa/CuCaOx stack contact exhibited a high mobility of 20.8 cm(2)/V.s and an Ion/off ratio of 108. Simultaneously, very stable behavior against the external positive/negate gate bias stress was observed for the a-IGZO thin-film transistors with the CuCa/CuCaOx stack contact. This was attributed to suppression of Cu-related acceptor-like traps due to the conformal formation of CuCaOx film with excellent barrier properties.en_US
dc.description.sponsorshipThis work was supported in part by the Industrial Strategic Technology Development Program funded by the Ministry of Knowledge Economy/Ministry of Energy, Industry and Trade under Grant 10048560 and in part by the National Research Foundation of Korea funded by the Korean Government under Grant NRF-2015R1A2A2A01003848.en_US
dc.language.isoen_USen_US
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INCen_US
dc.subjectAmorphous InGaZnO (a-IGZO)en_US
dc.subjectCu-Ca alloyen_US
dc.subjectdiffusion barrieren_US
dc.subjecthigh mobilityen_US
dc.subjectstabilityen_US
dc.subjectthin-film transistors (TFTs)en_US
dc.titleCa-Doped CuO Diffusion Barrier for High-Performance a-IGZO Transistors With Cu-Based Source/Drain Materialen_US
dc.typeArticleen_US
dc.relation.no4-
dc.relation.volume65-
dc.identifier.doi10.1109/TED.2018.2806362-
dc.relation.page1383-1390-
dc.relation.journalIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.contributor.googleauthorLee, Chang Kyu-
dc.contributor.googleauthorIn, Da Young-
dc.contributor.googleauthorOh, Dong Ju-
dc.contributor.googleauthorLee, Sang Ho-
dc.contributor.googleauthorLee, Ji Won-
dc.contributor.googleauthorJeong, Jae Kyeong-
dc.relation.code2018003012-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidjkjeong1-
dc.identifier.orcidhttp://orcid.org/0000-0003-3857-1039-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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