Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 송윤흡 | - |
dc.date.accessioned | 2019-11-27T20:18:15Z | - |
dc.date.available | 2019-11-27T20:18:15Z | - |
dc.date.issued | 2017-07 | - |
dc.identifier.citation | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v. 17, no. 7, page. 5055-5060 | en_US |
dc.identifier.issn | 1533-4880 | - |
dc.identifier.issn | 1533-4899 | - |
dc.identifier.uri | https://www.ingentaconnect.com/content/asp/jnn/2017/00000017/00000007/art00090;jsessionid=6g7tccss5hn5d.x-ic-live-02 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/114975 | - |
dc.description.abstract | We investigated the stress distribution and electrical characteristics according to changes in the process parameters in a vertical NAND (VNAND) flash cell with a poly-Si channel. We used technology computer-aided design to confirm that process parameters changes affect the stress distribution in a VNAND flash cell and the stress in the poly-Si channel. Also, we found that, as the stress distributions changed, the electrical characteristics depended significantly on the annealing temperature, channel hole angle, and tungsten intrinsic stress in a VNAND flash cell. Thus, the industry needs to develop and apply better process parameters and acquire a better understanding of how the electrical characteristics of a VNAND flash cell depend on those parameters. | en_US |
dc.description.sponsorship | This research was supported by Nano Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT and Future Planning (NRF-2016M3A7B4910398). This work was also supported by IDEC (EDA Tool, MPW). | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | AMER SCIENTIFIC PUBLISHERS | en_US |
dc.subject | Vertical NAND Flash | en_US |
dc.subject | Poly-Si Channel Stress | en_US |
dc.subject | Taper Angle | en_US |
dc.subject | Annealing Temperature | en_US |
dc.subject | Intrinsic Stress | en_US |
dc.title | Mechanical Stress Distribution and the Effects of Process Parameter Changes in Vertical NAND Flash Memory | en_US |
dc.type | Article | en_US |
dc.relation.no | 7 | - |
dc.relation.volume | 17 | - |
dc.identifier.doi | 10.1166/jnn.2017.13739 | - |
dc.relation.page | 5055-5060 | - |
dc.relation.journal | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.contributor.googleauthor | Namkoong, Yeon | - |
dc.contributor.googleauthor | Yang, Hyung Jun | - |
dc.contributor.googleauthor | Song, Yun Heub | - |
dc.relation.code | 2017011537 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | yhsong2008 | - |
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