Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 유창식 | - |
dc.date.accessioned | 2019-10-10T04:39:43Z | - |
dc.date.available | 2019-10-10T04:39:43Z | - |
dc.date.issued | 2019-04 | - |
dc.identifier.citation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v. 19, NO 2, Page. 220-225 | en_US |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.issn | 2233-4866 | - |
dc.identifier.uri | http://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE08007003&language=ko_KR | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/110946 | - |
dc.description.abstract | A DC-offset of a continuous-time linear equalizer (CTLE) is cancelled by an analog offset canceller (OFC). The bandwidth (BW) of the OFC is designed to be 10-kHz not to affect the received signal integrity. The BW of the OFC set by an active-RC integrator is lowered by increasing the effective resistance through pulse width modulation (PWM). The input offset of the OFC itself is removed by employing chopping technique. The offset-cancelled CTLE is applied to a four-channel 12-Gb/s wireline receiver compliant with the high-definition multimedia interface (HDMI) version 2.1 standard. The 12-Gb/s wireline receiver has been implemented in a 28-nm CMOS process. The eye opening for the bit-error rate (BER) smaller than 10(-12) becomes larger than 0.26 unit-interval (U1) with the OFC while the BER is always larger than 10(-12) without the OFC. | en_US |
dc.description.sponsorship | This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (NRF-2016R1D1A1B03930310). The CAD tools were provided by the IC Design Education Center (IDEC), Korea. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEK PUBLICATION CENTER | en_US |
dc.subject | Continuous-time linear equalizer (CTLE) | en_US |
dc.subject | offset cancellation | en_US |
dc.subject | chopping | en_US |
dc.subject | pulse width modulation (PWM) | en_US |
dc.subject | CMOS | en_US |
dc.title | A 12-Gb/s continuous-time linear equalizer with offset canceller | en_US |
dc.type | Article | en_US |
dc.relation.no | 2 | - |
dc.relation.volume | 19 | - |
dc.identifier.doi | 10.5573/JSTS.2019.19.2.220 | - |
dc.relation.page | 220-225 | - |
dc.relation.journal | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.contributor.googleauthor | Lim, Baekjin | - |
dc.contributor.googleauthor | Yoo, Changsik | - |
dc.relation.code | 2019038164 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | csyoo | - |
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