Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lipo, Thomas Anthony | - |
dc.date.accessioned | 2019-09-03T07:03:42Z | - |
dc.date.available | 2019-09-03T07:03:42Z | - |
dc.date.issued | 2005-01 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON POWER ELECTRONICS, v. 20, No. 1, Page. 90-99 | en_US |
dc.identifier.issn | 0885-8993 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/1377396 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/110144 | - |
dc.description.abstract | Cascaded multilevel inverters can be implemented through the series connection of single-phase modular power bridges. This paper presents details on how these bridges should be implemented and operated to synchronize their pulse-width-modulation (PWM) carriers, fundamental references and sampling instances to implement a network-controlled cascaded inverter with distributed PWM computation and overall optimal system performance. The paper begins by detailing the development and control of an integrated power bridge, designed with its own digital signal processor and associated control circuitry. Details describing the networked control algorithm and signal protocol needed for synchronizing the multiple power bridges through a dynamically fast data communication network, are then presented to achieve optimum harmonic cancellation and reduced common-mode voltage. The practicality and performance of the presented modular implementation concepts have been confirmed through the close match between simulation and experimental results obtained using a modular cascaded five-level inverter prototype. | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | en_US |
dc.subject | common-mode voltages | en_US |
dc.subject | distributed computation | en_US |
dc.subject | harmonic analysis | en_US |
dc.subject | integrated power bridges | en_US |
dc.subject | multilevel inverters | en_US |
dc.subject | synchronization | en_US |
dc.title | Implementation and Control of a Distributed PWM Cascaded Multilevel Inverters With Minimal Harmonic Distortion and Common-Mode Voltage | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TPEL.2004.839830 | - |
dc.relation.journal | IEEE TRANSACTIONS ON POWER ELECTRONICS | - |
dc.contributor.googleauthor | Loh, PC | - |
dc.contributor.googleauthor | Holmes, DG | - |
dc.contributor.googleauthor | Lipo, TA | - |
dc.relation.code | 2007203889 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | lipo | - |
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