Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 어영선 | - |
dc.date.accessioned | 2019-05-13T07:31:13Z | - |
dc.date.available | 2019-05-13T07:31:13Z | - |
dc.date.issued | 2009-07 | - |
dc.identifier.citation | 대한전자공학회 2009년 하계종합학술대회, Page. 407-408 | en_US |
dc.identifier.uri | http://www.dbpia.co.kr/Journal/ArticleDetail/NODE02335943 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/104049 | - |
dc.description.abstract | A via is experimentally characterized by using high-frequency s-parameter measurements. Test patterns are designed and fabricated by using a package process. They are measured by using VNA (vector network analyzer) up to 25GHz. The parasitic effects due to access lines for on-wafer probing are deembedded. Then modeling the via as T-type circuit, the circuit model parameters are determined. It is shown that the proposed technique has excellent agreement with the measured s-parameters. | en_US |
dc.description.sponsorship | 본 논문은 2009년도 정부(교육과학기술부)의 재원으 로 한국과학재단의 지원을 받아 수행된 연구임 (No. 2009-0075375). | en_US |
dc.language.iso | ko_KR | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.title | 다층 배선 비아(Via)의 고주파 측정 기반 회로 모델링 | en_US |
dc.title.alternative | Circuit Modeling of Multi-Layer Interconnect Via based on High Frequency Measurement | en_US |
dc.type | Article | en_US |
dc.contributor.googleauthor | 김혜원 | - |
dc.contributor.googleauthor | 김동철 | - |
dc.contributor.googleauthor | 어영선 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | eo | - |
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