Step-Down Spatial Randomness Test for Detecting Abnormalities in DRAM Wafers with Multiple Spatial Maps
- Title
- Step-Down Spatial Randomness Test for Detecting Abnormalities in DRAM Wafers with Multiple Spatial Maps
- Author
- 김병훈
- Keywords
- DRAM; join count statistics; kernel-density estimation; spatial local de-noising; step-down randomness testing
- Issue Date
- 2016-02
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v. 29, No. 1, Page. 57-65
- Abstract
- Defects on semiconductor wafers are not uniformly distributed, but tend to cluster. These spatial defect patterns contain useful information about issues during integrated circuit fabrication. Promptly detecting abnormal wafers is an important way to increase yield and product quality. However, research on identifying spatial defect patterns has focused only on flash memory with a single wafer map. No procedure is available for identifying spatial defect patterns on dynamic random access memory (DRAM) with multiple wafer maps. This paper proposes a new step-down spatial randomness test for detecting abnormalities on a DRAM wafer with multiple spatial maps. We adopt nonparametric Gaussian kernel-density estimation to transform the original fail bit test (FBT) values into binary FBT values. We also propose a spatial local de-noising method to eliminate noisy defect chips to distinguish the random defect patterns from systematic ones. We experimentally validated the proposed procedure using real-life DRAM wafers. These experimental results demonstrate that our approach can viably replace manual detection of abnormal DRAM wafers.
- URI
- https://ieeexplore.ieee.org/document/7293708https://repository.hanyang.ac.kr/handle/20.500.11754/100567
- ISSN
- 0894-6507; 1558-2345
- DOI
- 10.1109/TSM.2015.2486383
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > INDUSTRIAL AND MANAGEMENT ENGINEERING(산업경영공학과) > Articles
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