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Showing results 4 to 8 of 8

Issue DateTitleAuthor(s)
2021-01LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies한재덕
2019-10A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance한재덕
2021-02An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS한재덕
2021-02Process-Portable and Programmable Layout Generation of Digital Circuits in Advanced DRAM Technologies한재덕
2019-07A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET한재덕
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