Failure signature analysis of power-opens in DDR3 SDRAMs
- Title
- Failure signature analysis of power-opens in DDR3 SDRAMs
- Author
- 백상현
- Keywords
- Power pin; Open defect; Power integrity; VDD bounce; Power distribution
- Issue Date
- 2018-09
- Publisher
- PERGAMON-ELSEVIER SCIENCE LTD
- Citation
- MICROELECTRONICS RELIABILITY, v. 88-90, No. Special SI, Page. 277-281
- Abstract
- Open defects in power pins can only be diagnosed indirectly, and these diagnoses are a challenging task in failure analysis due to the failure signature's aliasing to other issues. Open defects cannot be detected by traditional DC type test methods and can remain a potential risk in stressful device operation. In this work, error signatures in power open faults are experimentally probed to better understand electrical signatures induced by power-open. The power open faults are intentionally injected into a DDR3 SDRAM test platform. The power network inside the DDR3 SDRAM is experimentally found to be asymmetrical. Power-open defects in one power pin produce a range of power noise (0-65 mV), depending on the location of the power pin.
- URI
- https://www.sciencedirect.com/science/article/pii/S0026271418305250https://repository.hanyang.ac.kr/handle/20.500.11754/81405
- ISSN
- 0026-2714
- DOI
- 10.1016/j.microrel.2018.06.104
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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