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Patterning of 32 nm 1:1 Line and Space by Resist Reflow Process

Title
Patterning of 32 nm 1:1 Line and Space by Resist Reflow Process
Author
정희준
Keywords
resist reflow process; 32 nm line and space half-pitch; Navier-Stokes equation
Issue Date
2008-11
Publisher
INST PURE APPLIED PHYSICS
Citation
JAPANESE JOURNAL OF APPLIED PHYSICS, v. 47, No. 11, Page. 8611-8614
Abstract
Producing a sub-32nm line and space pattern is one of the most important issues in semiconductor manufacturing. In particular, it is important 10 produce line and space patterns in flash memory-type devices because the unit cell is mostly composed of line and space patterns. The double patterning method is regarded as the most promising technology for producing, a sub-32 nm half-pitch node. However. the double patterning method is expensive for the production and a heavy data split is required. In order to achieve cheaper and easier patterning, we propose a resist reflow process (RRP) for producing 32 nm 1 : 1 line and space patterns. In many cases, it is easier to produce a 1 : 3 pitch line and space pattern than a 1 : 1 pitch line and space pattern ill terms of the aerial image. and RRP can transform a 1 : 3 pitch aerial image to a 1 : 1 resist image. We used a home-made RRP simulation based on the Navier-Stokes equation including the surface tension effect. Solid-E of Synopsis is used for the optical simulation, and electron-beam lithography is used for the experiment to verify the concept.
URI
http://iopscience.iop.org/article/10.1143/JJAP.47.8611/metahttp://repository.hanyang.ac.kr/handle/20.500.11754/80751
ISSN
0021-4922
DOI
10.1143/JJAP.47.8611
Appears in Collections:
COLLEGE OF SCIENCE AND CONVERGENCE TECHNOLOGY[E](과학기술융합대학) > APPLIED PHYSICS(응용물리학과) > Articles
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