A Physics-Based Compact Model of III-V FETs for Digital Logic Applications: Current-Voltage and Capacitance-Voltage Characteristics
- Title
- A Physics-Based Compact Model of III-V FETs for Digital Logic Applications: Current-Voltage and Capacitance-Voltage Characteristics
- Author
- 오새룬터
- Keywords
- Compact model; digital logic; III-V field-effect transistor (FET); InGaAs; SILICON SUBSTRATE; MOSFETS; SCATTERING; MOBILITY; DRAIN; SI; TRANSISTORS; SIMULATION; CHANNEL; DEVICE
- Issue Date
- 2009-12
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v. 56, No. 12, Page. 2917-2924
- Abstract
- A physics-based analytical compact model of InGaAs field-effect transistors (FETs) for digital logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation while capturing the essential physics, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures short channel effects, trapezoidal-shape quantum-well energies, bias-dependent ballistic ratios, and capacitances including 2-D potential profile information. Each is verified via numerical calculations and 2-D electrostatic simulation, followed by a comparison of the model I-V characteristics with experiment data. Finally, the transient response of FO4 inverters demonstrates the use of the compact model for future technology circuit simulations.
- URI
- https://ieeexplore.ieee.org/abstract/document/5306171https://repository.hanyang.ac.kr/handle/20.500.11754/76739
- ISSN
- 1557-9646; 0018-9383
- DOI
- 10.1109/TED.2009.2033411
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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