Low-Power Area-efficient High-Voltage Linear Amplifier for Driving Integrated 2-D Ultrasound Transducer Array

Abstract

In this paper, a low-power area-efficient high-voltage (HV) linear amplifier using a current feedback (CFB) topology is proposed for driving integrated 2-D ultrasound transducer array. The CFB topology reduces power consumption of the HV linear amplifier by fixing bandwidth independent of voltage gain. Also, integration of the circuit underneath an ultrasound transducer saves the area by reducing the number of buffering laterally double-diffused MOSFETs (LDMOSFETs) driving capacitive load of the connection cable between front-end circuit and the ultrasound transducer array. Simulation results are obtained by using HSPICE in a 0.18 ㎛ CMOS process with 50 V LDMOSFET devices. The voltage gain is 42.9 ㏈ at 3 ㏈ cut-off frequency of 6.2 ㎒. The total static power consumption and the chip area are 5.6 ㎿ and 0.017 ㎟, respectively. This results show that the circuit is suitable for driving integrated 2-D ultrasound transducer array.