433 0

Full metadata record

DC FieldValueLanguage
dc.contributor.author노정진-
dc.date.accessioned2018-05-29T06:26:05Z-
dc.date.available2018-05-29T06:26:05Z-
dc.date.issued2017-01-
dc.identifier.citationANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 90, No. 1, Page. 227-235en_US
dc.identifier.issn0925-1030-
dc.identifier.issn1573-1979-
dc.identifier.urihttps://link.springer.com/article/10.1007/s10470-016-0869-z-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/71643-
dc.description.abstractIn this paper, an output-capacitorless, low-dropout (LDO) voltage regulator with excellent load regulation and fast recovery time was designed using two amplifiers, which provided high gain, high bandwidth (HBW), and high slew rate (HSR). In addition, a one-shot current boosting (OSCB) circuit was added for current control to charge and discharge the parasitic capacitance at the power transistor gate during the load-current transition to improve the response time. The experimental results show that the proposed LDO regulator consumes a quiescent current of only 4.5 μA and can deliver a maximum load current of 200 mA, while regulating the output voltage at 1\,V with a 1.2 V power supply. We experimentally verified that for a current transition from 0.1 to 200 mA, the undershoot and overshoot voltages were 260 and 190\,mV, with recovery times of only 0.8 and 0.85 μs, respectively.en_US
dc.description.sponsorshipThis work was supported by the R&D program of MOTIE/KEIT (10063683, ultra-precision and ultra-low-power analog circuit IP for smart sensors of mobile devices), and supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2016R1A2B2011248).en_US
dc.language.isoen_USen_US
dc.publisherSPRINGERen_US
dc.subjectVoltage regulatoren_US
dc.subjectLow-dropout regulatoren_US
dc.subjectHigh slew rateen_US
dc.subjectLOW-QUIESCENT CURRENTen_US
dc.subjectLDO REGULATORen_US
dc.subjectCMOSen_US
dc.subjectTECHNOLOGYen_US
dc.titleA capacitorless low-dropout regulator with enhanced slew rate and 4.5-μA quiescent currenten_US
dc.typeArticleen_US
dc.relation.no1-
dc.relation.volume90-
dc.identifier.doi10.1007/s10470-016-0869-z-
dc.relation.page227-235-
dc.relation.journalANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING-
dc.contributor.googleauthorYeo, Jaejin-
dc.contributor.googleauthorJaved, Khurram-
dc.contributor.googleauthorLee, Jaeseong-
dc.contributor.googleauthorRoh, Jeongjin-
dc.contributor.googleauthorPark, Jae-Do-
dc.relation.code2017003117-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidjroh-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE