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dc.contributor.author정기석-
dc.date.accessioned2018-04-16T03:25:54Z-
dc.date.available2018-04-16T03:25:54Z-
dc.date.issued2012-10-
dc.identifier.citationElectronics Letters, 11 October 2012, 48(21), p.1333-1334en_US
dc.identifier.issn0013-5194-
dc.identifier.urihttp://digital-library.theiet.org/content/journals/10.1049/el.2012.2624-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/67662-
dc.description.abstractComputational power of embedded graphics processing units (GPUs) in mobile system-on-chips has been increasing steadily to provide high quality user experience related to 2D and 3D graphics. Moreover, the architecture of embedded GPUs is evolving from graphic accelerators into streaming multiprocessors, which enables programmers to use GPUs for general parallel processing. Workload variations in mobile GPU applications are explored to discover the potential of dynamic voltage and frequency scaling (DVFS) on embedded GPUs. A DVFS framework which considers GPUs as computing devices, not graphic accelerators, is proposed. The experimental results show that a conventional processor DVFS policy can achieve power reduction of embedded GPUs with reasonable performance degradation.en_US
dc.language.isoenen_US
dc.publisherIETen_US
dc.subjectsystem-on-chipen_US
dc.subjectembedded systemsen_US
dc.subjectgraphics processing unitsen_US
dc.subjectmultiprocessing systemsen_US
dc.subjectparallel processingen_US
dc.titleDynamic voltage and frequency scaling framework for low-power embedded GPUsen_US
dc.typeArticleen_US
dc.relation.no21-
dc.relation.volume48-
dc.identifier.doi10.1049/el.2012.2624-
dc.relation.page1333-1334-
dc.relation.journalELECTRONICS LETTERS-
dc.contributor.googleauthorYou, D.-
dc.contributor.googleauthorChung, K. S.-
dc.relation.code2012202795-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidkchung-
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COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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