Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박성주 | - |
dc.date.accessioned | 2023-08-22T01:41:59Z | - |
dc.date.available | 2023-08-22T01:41:59Z | - |
dc.date.issued | 2010-07 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v. 57, NO. 7, article no. 5371852, Page. 1608-1617 | - |
dc.identifier.issn | 1549-8328;1558-0806 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/5371852 | en_US |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/185658 | - |
dc.description.abstract | This paper presents a design-for-debug (DfD) technique for network-on-chip (NoC)-based system-on-chips (SoCs). We present a test wrapper and, a test and debug interface unit. They enable data transfer between a tester/debugger and a core-under-test (CUT) or -debug (CUD) through the available NoC to facilitate test and debug. We also present a novel core debug supporting logic to enable transaction-and scan-based debug operations. The basic operations supported by our scheme include event processing, stop/run/single-step and selective storage of debug information such as current state, time, and debug event indication. This allows internal visibility and control into core operations. Experimental results show that single and multiple stepping through transactions are feasible with moderately low area overhead. | - |
dc.description.sponsorship | Manuscript received April 04, 2009; revised June 10, 2009 and August 13, 2009; accepted September 23, 2009. Date of publication December 31, 2009; date of current version July 16, 2010. This work was supported by the Korea Research Foundation Grant funded by the Korean Government (MOEHRD) under Grant KRF-2007-357-D00229. An earlier version of this paper was presented at the 17th Asian Test Symposium (ATS) 2008. This paper was recommended by Associate Editor V. De. | - |
dc.language | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | Design-for-debug (DfD) | - |
dc.subject | design-for-testability (DfT) | - |
dc.subject | digital system testing | - |
dc.subject | network-on-chip (NoC) | - |
dc.subject | system-on-chip (SoC) | - |
dc.title | On-Chip Support for NoC-Based SoC Debugging | - |
dc.type | Article | - |
dc.relation.no | 7 | - |
dc.relation.volume | 57 | - |
dc.identifier.doi | 10.1109/TCSI.2009.2034887 | - |
dc.relation.page | 1608-1617 | - |
dc.relation.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.contributor.googleauthor | Yi, Hyunbean | - |
dc.contributor.googleauthor | Park, Sungju | - |
dc.contributor.googleauthor | Kundu, Sandip | - |
dc.sector.campus | E | - |
dc.sector.daehak | 소프트웨어융합대학 | - |
dc.sector.department | 소프트웨어학부 | - |
dc.identifier.pid | paksj | - |
dc.identifier.article | 5371852 | - |
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