Divulge of Root Cause Failure in Individual Cells of 2x nm Technology DDR4 DRAM at Operating Temperature

Abstract

This article reveals the leakage mechanisms corresponding to the dominant leakage path of individual tail cells in 2xnmtechnologydouble data rate (DDR)4DRAM at operating temperature. For leakage path determination, activation energy ( Ea) was used as a tool through its extraction by retention time measurement. To get a wide distribution of Ea, retention testing was performed at the target retention time (10, 15, 20, or 25 s); during this, the number of retentions failed cells were recorded with each temperature. In this experiment, 1.65 e-2% of the selected bank cells found retention failures. From the total retention failed cells, the selected commonly retention failed cells at the target retention times comprise 1.5 e-3% of the selected bank cells. From commonly retention failed cells, the distribution of Ea is analyzed with the retention time at room temperature. This analysis reveals that subthreshold, junction, and gate-induced drain leakage (GIDL) leakage paths dominate in 3.48%, 93.89%, and 2.61% of the total retention failed cells, respectively, at room temperature. Using another experimental approach, retention testing performed at operating temperature on selected 0.07-ppm retention tail cells concludes that GIDL is the dominant leakage path in this device. Correlation between Ea and retention time measured at operating temperature (40 degrees C, 60 degrees C, or 80 degrees C) explored the leakage mechanisms corresponding to Ea of the extracted dominant leakage path (GIDL). These failure leakage mechanisms, dominating on certain values of operating temperature, are divulged as the root cause of failure at that temperature.