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dc.contributor.author노정진-
dc.date.accessioned2023-07-13T01:52:31Z-
dc.date.available2023-07-13T01:52:31Z-
dc.date.issued2016-10-
dc.identifier.citationIDEC Journal of Integrated Circuits and Systems, v. 2, NO. 3, Page. 14-19-
dc.identifier.urihttps://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART002653745en_US
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/183447-
dc.description.abstractThis paper presents a multi stage noise shaping (MASH) delta-sigma modulator (DSM) for high speed data signal processing. This delta-sigma modulator (DSM) is discrete-time modulator (DT) and sampling of the input signal occurs prior to the loop filter. Discrete-time (DT) modulator has lower performance degradation from excess loop delay, clock jitter, process variation than Continuous-time (CT) modulator. A 4-Phase buck converter is used to supply power in delta-sigma modulator (DSM). The delta-sigma modulator (DSM) power supply is 1.8V. The buck converter has low EMI using spread spectrum. To implement spread spectrum, the paper proposes random clock generator. The buck converter supply voltage 3V and Output voltage is 1.8V. Switching frequency ranges from 7 to 9 MHz and Maximum load current is 500mA. The delta-sigma modulator (DSM) and buck converter is fabricated in 0.18㎛ CMOS process and circuit type is Mixed-design.-
dc.languageen-
dc.publisher한국과학기술원 반도체설계교육센터-
dc.titleMulti Stage Noise Shaping Delta-Sigma Modulator-
dc.typeArticle-
dc.relation.no3-
dc.relation.volume2-
dc.relation.page14-19-
dc.relation.journalIDEC Journal of Integrated Circuits and Systems-
dc.contributor.googleauthor이재성-
dc.contributor.googleauthor노정진-
dc.sector.campusE-
dc.sector.daehak공학대학-
dc.sector.department전자공학부-
dc.identifier.pidjroh-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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