Neuromorphic System with Diffusion Memristor-based Artificial Synapses

Abstract

The semiconductor industry has improved according to Moore's law, however recently, the Von-Neumann architecture is faced a limitation of a bottleneck between the CPU and memory in processing a large amount of data. As an alternative to overcome the bottleneck, a neuromorphic architecture that integrates memory semiconductors and CPUs into one like the human brain is possible to process a large amount of data and has the advantage of being able to process data with low power due to the parallel structure. In order to realize the neuromorphic architecture, a various fields such as computing systems, circuits, devices, and materials require the research and development. In this study, a diffusion memristor using high k material compatible with CMOS was studied as neuromorphic device and the synaptic characteristics were verified at the array level by connecting to the CMOS circuit. The previously neuromorphic research field has been developed based on software, whereas hardware-based research is rather insignificant. We focused on implementing a hardware-based neuromorphic system that can verify characteristics and succeeded in stable synaptic properties by identifying materials and device mechanisms and applying them to circuits. The bi-layer diffusion memristor was designed by appling a fully oxidation thin film HfO2 layer as a stable switching layer and a PVD Ta2O5 thin film as a control layer that control Ag diffusion by utilizing the property of metal diffusion following oxygen vacancy caused by partial oxidation. A mechanism of the diffusion memristor was verified and studied through chemical analysis such as X-ray photoelectron spectroscopy (XPS) and X-ray reflectometry (XRR). The bi-layer memristor exhibited a volatile characteristics regardless of the compliance current and mimicked the Ca2+ channel in biological synapses, which showed the forgetting curve and learning property form the long-term to the short-term according to the synaptic weight. In addition, since Ag diffusion through the control layer of Ta2O5 could be finely controlled, quantum conductance characteristics was measured. The bi-layer diffusion memristor appeared a low operating voltage (VSET) of 0.2 V and a ON/OFF ratio of 109. The developed bi-layer device was carried out a thickness engineering to apply an array structure that has advantageous for scaling down and deposited to a total thickness of ~6 nm. The VSET variation (σ) of the bi-layer device was 0.047, and VSET reliability was secured compared to the σ, 0.082 of the single-layer device, and the switching endurance was exhibited more than 104 times. The bi-layer array device was deposited and interconnected on a CMOS (Magnachip MPDK 18G) circuit that was designed to generate and selectively transmit pulses and then processed into a chip state through wire bonding and packaging. After that, it aligned to the PCB board connected to the power supply, KEYS B1500A, and NI USB-6289 controlled by the Lab-view program. Finally, through the configured system, the synaptic characteristics such as the learning curve and spike rate dependent plasticity (SRDP) according to the synaptic weight that was generated through the lower CMOS circuit was verification. It was confirmed that the bi-layer array device had lower synaptic current variation in the learning curve compared to the single-layer device, and that of the initial learning rate was higher according to the bi-layer filament mechanism. The SiO2/Si thin film was transferred to the CMOS wafer through the wafer bonding process and the 3-terminal TFT array device with IGZO channel was interconnected and packaged to realize an on-chip state. The on-chip TFT array device mimicked the synaptic plasticity such as excitatory post-synaptic current (EPSC), forgetting curve, and potentiation/depression and was obtained simulation results with an accuracy of 92% by appling a convolutional neural networks (CNN). As a results, compared to other research, the hardware systemic differentiation was secured by verifying the 3D integration and applying the various structures and devices such as two- and three-terminal while successfully demonstrating synaptic plasticity.