DDR4 BER Degradation Due to Crack in FBGA Package Solder Ball
- Title
- DDR4 BER Degradation Due to Crack in FBGA Package Solder Ball
- Author
- 백상현
- Keywords
- FBGA; crack; solder ball; data channel; data eye; bit error rate; BER degradation; DDR4
- Issue Date
- 2021-04
- Publisher
- MDPI
- Citation
- ELECTRONICS, v. 10, NO 12, Page. 1-9
- Abstract
- This paper measures bit error rate degradation in DDR4 due to crack in fine pitch ball grid array (FBGA) package solder ball. Thermal coefficient mismatch between the package and printed circuit board material causes cracks to occur in solder balls. These cracks change the electrical model of the solder ball and introduce parallel capacitance in the electrical model. The capacitance causes higher frequency attenuation and closes the data eye. As the data rate of the DDR4 increases there are more data eye closures. The data eye closure causes bit error rate (BER) degradation as the timing margin and voltage margin decreases. This degradation reduces the reliability of the system and causes more intermittent errors. DDR4 data line is loaded with a parallel capacitive element to mimic a crack in solder ball. The measured data eye shows a decrease in eye width. Bathtub plots are created for comparison of cracked solder ball and intact solder ball. The bathtub plots show the BER degradation due to crack in solder ball.
- URI
- https://www.proquest.com/docview/2544961633?accountid=11283https://repository.hanyang.ac.kr/handle/20.500.11754/171744
- ISSN
- 20799292
- DOI
- 10.3390/electronics10121445
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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