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dc.contributor.author어영선-
dc.date.accessioned2021-02-16T05:31:25Z-
dc.date.available2021-02-16T05:31:25Z-
dc.date.issued2001-06-
dc.identifier.citationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 9, issue. 3, page. 450-460en_US
dc.identifier.issn1063-8210-
dc.identifier.issn1557-9999-
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/929579-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/158372-
dc.description.abstractA new fast and accurate capacitance determination methodology for intricate multilayer VLSI interconnects is presented, Since a multilayer interconnect structure is too complicated to be directly tractable, it is simplified by investigating charge distributions within the system, The quasi-three-dimensional (3-D) capacitances of the structure are then determined by combining a set of solid-ground-based two-dimensional (2-D) capacitances and shielding effects that can be independently calculated from the simplified structure, The shielding effects due to the neighboring lines of a line can be analytically determined from the given layout dimensions, The solid-ground-based 2-D capacitances can also be quickly computed from the simplified structure. Thus, the proposed capacitance determination methodology is much more cost-efficient than conventional 3-D-based methods. It is shown that the calculated quasi-3-D capacitances have excellent agreement with 3-D held-solver-based results within 5% error.en_US
dc.description.sponsorshipThis work was supported by the Center for Electronic Packaging Materials, Korea Science and Engineering Foundation.en_US
dc.language.isoen_USen_US
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INCen_US
dc.subjectCrosstalken_US
dc.subjectinterconnect capacitanceen_US
dc.subjectmultilayeren_US
dc.subjectshielding effecten_US
dc.subjectsignal delayen_US
dc.subjectVLSI interconnectsen_US
dc.titleFast and Accurate Quasi-3-Dimensional Capacitance Determination of MultiLayer VLSI Interconnectsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/92.929579-
dc.relation.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.contributor.googleauthorJin, Woojin-
dc.contributor.googleauthorEo, Yungseon-
dc.contributor.googleauthorEisenstadt, W.R.-
dc.contributor.googleauthorShim, J.-
dc.relation.code2009203903-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pideo-
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COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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