Consideration of an Oxide-Nitride-Oxide-Nitride Layer for the Inter-Poly Dielectric of a Flash EEPROM Cell

Abstract

The continuous scaledown of Flash EEPROM devices has resulted in a demand for gate oxide layer thickness of the peripheral MOSFET's to be reduced below 10 nm. In this paper, the use of an oxide-nitride-oxide-nitride) layer instead of the conventional ONO(oxide-nitride-oxide) layer, for the IPD (inter-poly-dielectrics) layer is proposed, and experimental results are discussed. For this study, Flash EEPROM cells with an IPD layer with ON, ONO, or ONON sructures were fabricated using 0.6 μm CMOS processes with p-type wafers. The measurement results showed that the data retention characteristics of the device were drastically improved and that the lifetime was increased by at least two orders of magnitude when an ONON layer was used as the IPD layer. This was because the top nitride layer the ONON layer protected the top oxide from being etched off during the cleaning process.