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A Traveling-Wave-Based Waveform Approximation Technique for Verification of Single Transmission Lines

Title
A Traveling-Wave-Based Waveform Approximation Technique for Verification of Single Transmission Lines
Author
심종인
Keywords
Signal delay; signal integrity; system pole; transmission line; traveling wave; VLSI interconnect
Issue Date
2002-06
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v. 21, issue. 6, page. 723-730
Abstract
Today's high-speed very large scale integration interconnects are becoming inductively dominated (moderate Q) resistance-inductance-capacitance (RLC) transmission lines. The time-domain system responses of RLC interconnect lines driving load capacitances cannot be accurately represented by using a finite number of poles with exception for a particular case of RC-time-constant-dominant (low Q) RLC systems. In this paper, a new traveling-wave-based waveform approximation technique is presented. The method suggests that a steady-state traveling wave is approximately determined by a three-pole approximation technique. Then the time-domain response of the system can be accurately determined by using the traveling waves that are modeled by multiple reflections. The signal delay models of the RLC interconnect lines are derived as a closed form. The technique is verified by varying the source resistance, load impedance, and transmission line circuit model parameters of several RLC lines. The results show excellent agreement with HSPICE simulation results. That is, approximately 5% error in a 50% delay calculation can be achieved.
URI
https://ieeexplore.ieee.org/abstract/document/1004316https://repository.hanyang.ac.kr/handle/20.500.11754/157050
ISSN
0278-0070; 1937-4151
DOI
10.1109/TCAD.2002.1004316
Appears in Collections:
COLLEGE OF SCIENCE AND CONVERGENCE TECHNOLOGY[E](과학기술융합대학) > PHOTONICS AND NANOELECTRONICS(나노광전자학과) > Articles
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