Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박성주 | - |
dc.date.accessioned | 2020-09-29T00:11:15Z | - |
dc.date.available | 2020-09-29T00:11:15Z | - |
dc.date.issued | 2005-07 | - |
dc.identifier.citation | 전자공학회논문지 SD편, v.42, No.7, Page.37-44 | en_US |
dc.identifier.issn | 1229-6368 | - |
dc.identifier.uri | https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE00609639 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/154228 | - |
dc.description.abstract | his paper presents effective test patterns and their BIST implementations for SoC and Board interconnects. Initially '6n' algorithm, where ,n, is the total number of interconnect nets, is introduced to completely detect and diagnose both static and crosstalk faults. Then, more economic 'An+V algorithm is described to perfectly capture the crosstalk faults for the interconnect nets separated within a certain distance. It will be shown that both algorithms can be easily implemented as interconnect BIST hardwares with small area penalty than conventional LFSR | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.subject | interconnect testing | en_US |
dc.subject | crosstalk faults | en_US |
dc.subject | test pattern generator | en_US |
dc.subject | BIST | en_US |
dc.subject | SoC | en_US |
dc.subject | static faults | en_US |
dc.title | Crosstalk과 정적 고장을 고려한 효과적인 연결선 테스트 알고리즘 및 BIST 구현 | en_US |
dc.title.alternative | Efficient Interconnect Test Patterns and BIST Implementation for Crosstalk and Static Faults | en_US |
dc.type | Article | en_US |
dc.contributor.googleauthor | 민병우 | - |
dc.contributor.googleauthor | 이현빈 | - |
dc.contributor.googleauthor | 송재훈 | - |
dc.contributor.googleauthor | 박성주 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF COMPUTING[E] | - |
dc.sector.department | DIVISION OF COMPUTER SCIENCE | - |
dc.identifier.pid | paksj | - |
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