Effective Cell Moving Techniques for K-way Partitioning

Abstract

As the complexity of circuits on a semiconductor chip increases, hierarchical design becomes important and the netlist partitioning becomes an essential technology for efficient design of high performance integrated circuits. In addition to our existing gradual constraint enforcement partitioning technology, we have developed new cell moving techniques to efficiently find near-optimum solutions under various size constraints. Cell moving techniques allow more “flexible” movements of cells among subsets and help to avoid being stuck at local minimum points. Experimental results show that new techniques improve the partition results by 6% on the average for a set of test examples.