Electrical Stability Analysis of Dynamic Logic Using Amorphous Indium-Gallium-Zinc-Oxide TFTs
- Title
- Electrical Stability Analysis of Dynamic Logic Using Amorphous Indium-Gallium-Zinc-Oxide TFTs
- Author
- 최병덕
- Keywords
- Amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs); electrical stress; dynamic logic; logic circuits; TFTs
- Issue Date
- 2019-07
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE ELECTRON DEVICE LETTERS, v. 40, no. 7, Page. 1128-1131
- Abstract
- Prior research has reported that the device characteristics of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) have been changed by instabilities due to electrical stress. Because positive bias stress and high current stress produce a positive threshold voltage shift, if the digital logic circuit is designed using a-IGZO TFTs, there is a high possibility that the circuit suffers from malfunction. In this letter, the dynamic and the static logic circuits using n-type a-IGZO TFTs are compared in terms of stability for electrical stress. In order to compare the stability of the two circuits, DC and AC signals are applied. The measurement results suggest that the dynamic logic circuit is much more stable than the static logic circuit regarding electrical stress.
- URI
- https://ieeexplore.ieee.org/document/8730370/https://repository.hanyang.ac.kr/handle/20.500.11754/151848
- ISSN
- 0741-3106; 1558-0563
- DOI
- 10.1109/LED.2019.2920634
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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