Highly reliable and low temperature flip-chip bonding technology using nonconductive adhesive and Sn based bumps for the ultra-fine pitch application

Abstract

In the field of flat panel displays, packaging technology has significant influence on display performance. The electrical interconnect between the LCD and the LCD driver circuit is an area that needs improvement to achieve finer pitch, easier assembly and greater connection reliability. For, LCD driver packaging, the ideal assembly process would possess the following characteristics: low processing cost reliability suitable to the final application, high-density and fine pitch capability, low product profile, ease of inspection, and reworkability. Facing the demand of shrinkage in display footprint and increase in pixel count, the lead pitch of electronic packages for LCD applications is getting finer, and at the same time, the pin count of a single chip is increasing. LCD manufacturers are trying hard to develop low-cost packaging processes that satisfy both requirements. In order to place more I/Os in the same die size, the bump pitch have gotten finer and finer. In general, there are two package types used in current products: chip-on-glass (COG) and chip-on-film (COF). Most of COG technology is based on ACF bonding, and the Au/Sn eutectic bonding method is currently being applied to the COF technology. However, These ACF bonding and Au/Sn eutectic bonding is difficult to apply to ultra-fine pitch applications because of several reasons. The Au/Sn eutectic bonding process is performed by heating the COF joints to generate the eutectic reaction between Au bump and Sn electrode, and then the underfill process is performed to protect the joints. The bonding temperature has to exceed the eutectic point, around 280℃. This high temperature can generate a lead breakage in ultra-fine pitch packaging due to thermally induced stresses, and cause a warpage problem and a misalignment due to the difference of thermal expansion between chips and films. In addition, it’s difficult to apply the underfill process to ultra-fine pitch packaging due to very small gaps between bumps. In ACF bonding, the reduction of bump and pitch sizes causes to reduce the number of conductive particles trapped between the bump on chip and the corresponding pads on the substrate and the electrical open is sometimes generated. In addition, if the gap between neighboring bumps decreases with pitch size reduction, the electrical short problem is generated due to the accumulation of the conductive particles by their flow into the bump gap. To solve these problems, the bonding technology using nonconductive adhesive (NCA) was suggested to a solution due to its great potential in for use in ultra-fine pitch application. Recently, in our group, 30 μm pitch COG joints using Sn/Cu bumps and NCA were introduced. However, there are several problems in previous results. First, the reliability was not proved yet. Second, In ITRS roadmap, the lead pitch size decreased to 10 μm pitch in 2015. A 30 μm pitch in our previous results is too large to satisfy this fine lead pitch size. Third, the properties of NCA have a great impact to the reliability of NCA applied flip-chip joints since only physical/mechanical contacts via cured NCA are formed. The effect of the properties of NCA on the reliability of joints should be evaluated. Finally, the fillers in NCA can be easily trapped between Sn bumps and Cu pads. New method to reduce the NCA trapping should be developed. In this study, therefore, this thesis includes three main objectives. The first objective is to develop 20 μm pitch COG joints and COF joints. A 20 μm pitch joints were formed in a row. If these joints were formed in two rows or three rows, we can satisfy the lead pitch of ITRS roadmap. The second objective is to prove the reliability of 20 μm pitch COG joints and COF joints. Additionally, we evaluated the effects of NCA properties on reliability of COG joints and COF joints. Finally, to reduce the NCA trapping, one concept was suggested. If the solder is melted during bonding process, uncured NCA can be pushed out due to the interfacial tension of melted solder, causing to reduce NCA trapping. Therefore, if the solders having low melting temperature, such as In-48Sn and Bi-42Sn solder, were used, we can reduce the NCA trapping in COG joints and COF joints using NCA. The effects of solder wetting on NCA trapping according to various solder materials and various bonding temperatures were investigated. In chapter 1, research background on electronic packaging, conventional flip-chip technology, flip-chip bonding technology using adhesives, LCD driver IC packaging, the limitation of ACF bonding in fine pitch application, review of COG and COF bonding using Sn based bumps, and research objectives are described. In chapter 2, a 20 μm pitch COG bonding with Sn/Cu bumps and NCAs was developed, the effect of NCA type on reliability was investigated. NCA, which has lower moisture absorption and a lower coefficient of thermal expansion, had the best performance in a reliability test. In chapter 3, we developed a low temperature and low cost COF bonding technology using Sn/Cu bumps and NCAs for 20 µm pitch applications. Three different commercial NCAs were applied during bonding. All COF joints were successfully bonded and the average contact resistance of each joint was approximately 7 mΩ, regardless of the type of NCA. After reliability tests, the contact resistance measurement showed that there were no failed bumps in any of the specimens and all of the joints passed the criterion. In the COF joints, metallurgical bonding was formed between the Sn/Cu bumps and Cu pads. This metallurgical bond provided strong and stable contact between the Sn/Cu bumps and Cu pads in the reliability tests. Chapter 4 introduces a new method reducing the NCA trapping in NCA applied flip-chip bonding. Three different solder materials with different melting point were used for the bonding process: In-48Sn, Bi-42Sn, and Sn-3.5Ag. Additionally, the bonding process was performed at various temperatures. We measured the amount of NCA trapping as functions of the solder material and bonding temperature. The trapped fillers and NCA could be reduced if the solder was melted and reacted to Cu pads during the bonding process. However, if the solder was melted after fully curing NCA, the trapped NCA was not reduced due to the low mobility of cured NCA. Therefore, in order to reduce NCA trapping, the solder should be melted before curing NCA. In appendix 1, the peel adhesion between two different electroless-plated Cu layers and polymer substrates was studied, which was performed with Daeduck electronic Co. Ltd. The COG and COF bonding technologies described in this dissertation are a low cost process and can be fabricated at low temperature. These technologies can be apply to not only a next generation display driver IC package, but also the conventional flip-chip technology, through silicon via (TSV) application and so on. Moreover, a simple and inexpensive process can be adaptable to the flexible/wearable electronic devices. |최근 평판 디스플레이 분야에서 최근 정보화 사회로 인해 수많은 디스플레이들이 개발되고 있으며, 고기능, 편리성에 대한 요구가 커짐에 따라 경량화, 박형화, 저소비 전력화가 가능한 평판 디스플레이 기술이 그 중에서도 LCD 는 평판 디스플레이 분야에서 가장 널리 사용되고 있는 표시 소자이다. 현재 LCD 의 기술적인 한계를 극복하기 위하여 최근 대면적화, 저소비 전력화, 광시각화를 추구하고 있으며, 성능면에서는 고휘도, 고대비비 및 고응답 속도의 달성을 요구하고 있다. 이에 따라서 LCD를 직접 구동하는 구동 소자의 성능 향상과 이러한 구동 소자를 LCD에 실장하는 packaging 기술의 발달이 요구되고 있다. 또한 고해상도를 구현하기 위해 작은 영역 안에 갈수록 더 많은 픽셀들이 자리 잡아야 하는 상황이므로 LCD 개개 픽셀들을 제어하는 구동 칩 (drive chip)의 리드피치(lead pitch) 또한 지속적으로 미세화 되고 있으며 많은 LCD 제조 및 조립업체들이 이러한 필요에 대응하기 위해 다양한 저가형 독자 패키징 공정을 개발하고 있다. 현재 적용되고 있는 대표적인 패키징 방법은 COG(Chip-On-Glass) 본딩과 COF(Chip-On-Flex) 본딩이 있다. COF 본딩은 driver IC(integrated circuit)를 플렉서블 필름에 부착한 후, 필름을 디스플레이 모듈에 접합하는 방법이고, COG 본딩은 driver IC를 디스플레이 모듈에 바로 접합하는 방법이다. COG 본딩과 COF 본딩에서 대표적으로 사용되고 있는 접합 방법은 ACF(Anisotropic conductive film)를 이용한 접합 방법과 Au/Sn 솔더링 방법이 있다. 하지만, 이러한 방법은 미세피치 적용분야에서 전기적 쇼트 및 오픈, 휨 (warpage), 고온으로 인한 lead break와 같은 심각한 문제를 야기한다. 따라서, 이에 대한 해결책으로 NCA(nonconductive adhesive)를 이용한 접합방법이 소개되었다. 최근 본 연구실에서는 Sn/Cu 범프와 NCA를 이용한 30 μm pitch의 COG 접합방법을 개발하였다. 하지만, 신뢰성 평가에 대한 연구는 아직 진행되지 않았으며, 미세피치의 COF 접합부 개발도 필요하다. 또, 현재 IRTS 로드맵에서 COF 및 COG의 lead pitch가 2015년에는 10 μm pitch에 해당하므로, 30 μm pitch로는 만족시키기가 다소 어렵다. 그리고, NCA를 이용한 COG 및 COF 접합은 NCA에 의한 기계적 결합으로 전기적 연결이 이루어지므로, NCA의 특성이 접합부에 미치는 영향이 매우 크다. 그에 따라, NCA의 어떠한 특성이 접합부에 어떻게 영향을 미치는지 연구할 필요가 있다. 마지막으로, NCA를 이용한 접합에서 filler 및 NCA의 트랩으로 인해 신뢰성에 악영향을 주는 문제가 있다. 그에 대한 해결책 개발이 시급하다. 따라서, 본 연구에서는 3가지 주된 목적을 가지고 있다. 첫번째로, ITRS 로드맵을 만족시키기 위하여 20 μm pitch의 COG 및 COF 접합 공정을 개발하였다. 여기서 COG 및 COF 접합부는 한 줄로 이루어져있기 때문에, 2~3줄로 늘인다면, 충분히 로드맵의 lead pitch를 만족시킬 수 있다. 두번째로, 여러가지 NCA를 사용하여 접합부의 신뢰성을 평가하였으며, NCA의 특성이 접합부에 어떠한 영향을 주는지 확인하였다. 마지막으로, NCA의 트랩을 줄이기 위하여, 하나의 새로운 개념을 소개하였다. NCA가 경화되기 전에 솔더가 녹게되면, 녹은 솔더의 표면장력으로 인해 트랩된 NCA가 밖으로 빠져나올 수 있다. 이러한 방법으로 NCA의 트랩을 줄일 수 있다. 따라서, 다양한 솔더 물질을 다양한 온도에서 접합을 실시하여, 솔더의 젖음이 NCA의 트랩에 어떠한 영향을 미치는지 관찰하였다. 1장에서는 전자패키징의 개요, 플립칩 접합 방법, 접착제를 이용한 플립칩 접합 방법, LCD driver IC 패키징의 개요 및 최신 동향, 미세피치에서 ACF를 이용한 접합 방법의 한계, 본 연구실의 기존 기술 및 연구 목표에 대해 소개하였다. 2장에서는 20 μm pitch COG 접합 기술에 대해 소개하였다. 그리고, NCA의 특성이 신뢰성에 미치는 영향을 분석하였으며, NCA가 낮은 CTE 및 수분흡습특성을 가질수록 좋은 신뢰성을 나타내는 것을 확인하였다. 3장에서는 20 μm pitch COF 접합 기술에 대해 소개하였다. COF에서는 신뢰성 테스트 후에 NCA의 종류에 관계없이 failure가 발견되지 않았으며, 그 원인은 신뢰성테스트 과정에서 발생하는 범프와 패드사이의 metallurgical reaction에 의해서다. 4장에서는 NCA의 트랩을 줄일 수 있는 방법으로 solder wetting을 소개하였으며, solder material의 종류와 접합 온도에 따른 NCA trap 변화를 분석하였다. NCA가 curing되기 전에 solder가 melting되면 NCA의 trap을 줄일 수 있따. 부록 1에서는 대덕전자와 함께 연구하였던 무전해 도금층과 폴리머 기판간의 접착력 결과와 무전해 도금층의 특성이 접착력이 미치는 영향을 분석하였다. 본 연구자가 개발한 미세피치 COG & COF 접합 방법은 차세대 디스플레이 driver IC 패키지 뿐만 아니라, 패키징 전반의 플립칩 공정, TSV 공정 등에 적용이 가능하다. 나아가, 현재 각광받고 있는 wearable devices와 같은 flexible device에서도 충분히 적용할 수 있다.; In the field of flat panel displays, packaging technology has significant influence on display performance. The electrical interconnect between the LCD and the LCD driver circuit is an area that needs improvement to achieve finer pitch, easier assembly and greater connection reliability. For, LCD driver packaging, the ideal assembly process would possess the following characteristics: low processing cost reliability suitable to the final application, high-density and fine pitch capability, low product profile, ease of inspection, and reworkability. Facing the demand of shrinkage in display footprint and increase in pixel count, the lead pitch of electronic packages for LCD applications is getting finer, and at the same time, the pin count of a single chip is increasing. LCD manufacturers are trying hard to develop low-cost packaging processes that satisfy both requirements. In order to place more I/Os in the same die size, the bump pitch have gotten finer and finer. In general, there are two package types used in current products: chip-on-glass (COG) and chip-on-film (COF). Most of COG technology is based on ACF bonding, and the Au/Sn eutectic bonding method is currently being applied to the COF technology. However, These ACF bonding and Au/Sn eutectic bonding is difficult to apply to ultra-fine pitch applications because of several reasons. The Au/Sn eutectic bonding process is performed by heating the COF joints to generate the eutectic reaction between Au bump and Sn electrode, and then the underfill process is performed to protect the joints. The bonding temperature has to exceed the eutectic point, around 280℃. This high temperature can generate a lead breakage in ultra-fine pitch packaging due to thermally induced stresses, and cause a warpage problem and a misalignment due to the difference of thermal expansion between chips and films. In addition, it’s difficult to apply the underfill process to ultra-fine pitch packaging due to very small gaps between bumps. In ACF bonding, the reduction of bump and pitch sizes causes to reduce the number of conductive particles trapped between the bump on chip and the corresponding pads on the substrate and the electrical open is sometimes generated. In addition, if the gap between neighboring bumps decreases with pitch size reduction, the electrical short problem is generated due to the accumulation of the conductive particles by their flow into the bump gap. To solve these problems, the bonding technology using nonconductive adhesive (NCA) was suggested to a solution due to its great potential in for use in ultra-fine pitch application. Recently, in our group, 30 μm pitch COG joints using Sn/Cu bumps and NCA were introduced. However, there are several problems in previous results. First, the reliability was not proved yet. Second, In ITRS roadmap, the lead pitch size decreased to 10 μm pitch in 2015. A 30 μm pitch in our previous results is too large to satisfy this fine lead pitch size. Third, the properties of NCA have a great impact to the reliability of NCA applied flip-chip joints since only physical/mechanical contacts via cured NCA are formed. The effect of the properties of NCA on the reliability of joints should be evaluated. Finally, the fillers in NCA can be easily trapped between Sn bumps and Cu pads. New method to reduce the NCA trapping should be developed. In this study, therefore, this thesis includes three main objectives. The first objective is to develop 20 μm pitch COG joints and COF joints. A 20 μm pitch joints were formed in a row. If these joints were formed in two rows or three rows, we can satisfy the lead pitch of ITRS roadmap. The second objective is to prove the reliability of 20 μm pitch COG joints and COF joints. Additionally, we evaluated the effects of NCA properties on reliability of COG joints and COF joints. Finally, to reduce the NCA trapping, one concept was suggested. If the solder is melted during bonding process, uncured NCA can be pushed out due to the interfacial tension of melted solder, causing to reduce NCA trapping. Therefore, if the solders having low melting temperature, such as In-48Sn and Bi-42Sn solder, were used, we can reduce the NCA trapping in COG joints and COF joints using NCA. The effects of solder wetting on NCA trapping according to various solder materials and various bonding temperatures were investigated. In chapter 1, research background on electronic packaging, conventional flip-chip technology, flip-chip bonding technology using adhesives, LCD driver IC packaging, the limitation of ACF bonding in fine pitch application, review of COG and COF bonding using Sn based bumps, and research objectives are described. In chapter 2, a 20 μm pitch COG bonding with Sn/Cu bumps and NCAs was developed, the effect of NCA type on reliability was investigated. NCA, which has lower moisture absorption and a lower coefficient of thermal expansion, had the best performance in a reliability test. In chapter 3, we developed a low temperature and low cost COF bonding technology using Sn/Cu bumps and NCAs for 20 µm pitch applications. Three different commercial NCAs were applied during bonding. All COF joints were successfully bonded and the average contact resistance of each joint was approximately 7 mΩ, regardless of the type of NCA. After reliability tests, the contact resistance measurement showed that there were no failed bumps in any of the specimens and all of the joints passed the criterion. In the COF joints, metallurgical bonding was formed between the Sn/Cu bumps and Cu pads. This metallurgical bond provided strong and stable contact between the Sn/Cu bumps and Cu pads in the reliability tests. Chapter 4 introduces a new method reducing the NCA trapping in NCA applied flip-chip bonding. Three different solder materials with different melting point were used for the bonding process: In-48Sn, Bi-42Sn, and Sn-3.5Ag. Additionally, the bonding process was performed at various temperatures. We measured the amount of NCA trapping as functions of the solder material and bonding temperature. The trapped fillers and NCA could be reduced if the solder was melted and reacted to Cu pads during the bonding process. However, if the solder was melted after fully curing NCA, the trapped NCA was not reduced due to the low mobility of cured NCA. Therefore, in order to reduce NCA trapping, the solder should be melted before curing NCA. In appendix 1, the peel adhesion between two different electroless-plated Cu layers and polymer substrates was studied, which was performed with Daeduck electronic Co. Ltd. The COG and COF bonding technologies described in this dissertation are a low cost process and can be fabricated at low temperature. These technologies can be apply to not only a next generation display driver IC package, but also the conventional flip-chip technology, through silicon via (TSV) application and so on. Moreover, a simple and inexpensive process can be adaptable to the flexible/wearable electronic devices.