Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박진성 | - |
dc.date.accessioned | 2019-11-29T05:43:31Z | - |
dc.date.available | 2019-11-29T05:43:31Z | - |
dc.date.issued | 2017-08 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v. 64, no. 10, page. 4123-4130 | en_US |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.issn | 1557-9646 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/8012542 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/115173 | - |
dc.description.abstract | Previously reported thin-film transistor (TFT) digital logic gates are mostly static circuits. If the static logic circuits are implemented using either nMOS or pMOS technologies alone, unlike CMOS technologies, the circuits consume high power because of the steady-state current, and take large circuit area. In this paper, the dynamic logic circuits using n-type a-IGZO TFTs are proposed to resolve the power and circuit area issues. The dynamic logic circuits such as inverters and nand gates are fabricated in an amorphous indium-gallium-zinc-oxide TFT technology, and traditional static logic circuits are also implemented with the same technology for comparison purposes. The measurement results show that the proposed dynamic logic circuit consumes no steady-state current, and the circuit area is reduced by 93.1%. | en_US |
dc.description.sponsorship | This work was supported in part by the Ministry of Trade, Industry and Energy under Grant 10052020 and in part by the Korea Display Research Corporation support program for the development of future devices technology for display industry. The review of this paper was arranged by Editor I. Kymissis. (Corresponding author: Byong-Deok Choi.) | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | en_US |
dc.subject | Amorphous indium-gallium-zinc-oxide thin-film transistor (a-IGZO TFT) | en_US |
dc.subject | dynamic logic | en_US |
dc.subject | logic circuit | en_US |
dc.subject | TFTs | en_US |
dc.title | Dynamic Logic Circuits Using a-IGZO TFTs | en_US |
dc.type | Article | en_US |
dc.relation.no | 10 | - |
dc.relation.volume | 64 | - |
dc.identifier.doi | 10.1109/TED.2017.2738665 | - |
dc.relation.page | 4123-4130 | - |
dc.relation.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.contributor.googleauthor | Kim, Jong-Seok | - |
dc.contributor.googleauthor | Jang, Jun-Hwan | - |
dc.contributor.googleauthor | Kim, Yong-Duck | - |
dc.contributor.googleauthor | Byun, Jung-Woo | - |
dc.contributor.googleauthor | Han, Kilim | - |
dc.contributor.googleauthor | Park, Jin-Seong | - |
dc.contributor.googleauthor | Choi, Byong-Deok | - |
dc.relation.code | 2017003133 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DIVISION OF MATERIALS SCIENCE AND ENGINEERING | - |
dc.identifier.pid | jsparklime | - |
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