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EUV lithography simulation for the 32 nm node

Title
EUV lithography simulation for the 32 nm node
Author
오혜근
Keywords
32 nm node; EUV Lithography; EUV mask; Optimization; Simulation
Issue Date
2006-02
Publisher
SPIE
Citation
Proceedings of SPIE - The International Society for Optical Engineering; SPIE 31st International Symposium on Advanced Lithography, v. 6151, Article no. 61510V
Abstract
Extreme Ultraviolet Lithography (EUVL) is one of the patterning technologies proposed for the next generation lithography (NGL) which makes pattern less than 50 nm critical dimension (CD). And EUVL uses a very short exposure wavelength of 13.4 nm. So it has many characteristic in common with optical lithography, but EUVL are different from the conventional mask applied to the projection optical lithography. Specially, industry experts generally agree that the biggest challenges and risks for the next generation of lithography systems involve the mask. In EUVL, a mask is produced by applying multilayers of molybdenum and silicon to a flat substrate. The circuit pattern is produced by applying a final EUV-absorbing metal layer and then etching away the metal to form the image of the circuit. Also, the light shining with 6 degrees oblique to mask can not get target CD easily because the shadow effect is influenced on pattern. Therefore we must understand this kind of effect before doing real process. We tried to change the structure of the mask in order to decrease this effect and to have enough process latitude for the 32 nm node. EUV mask is affected by the thickness and kind of absorber and buffer material. First, we changed the absorber material such as Cr, TaN and Ge etc. without changing the buffer material. Second, we changed the thickness of the absorber materials. We tried to minimize the shadow effect by adjusting the side wall angle of the absorber layer parallel to the oblique incidence. Additionally we considered different shapes and depth of the etched multilayer binary mask and the refilled multilayer binary mask such as the inclined side wall of the etched multilayer. In this paper, we will describe the optimized EUV mask structure for 32 nm node by studying not only the aerial image, but also the resist profile. Solid-EUV simulator of Sigma-C is used to calculate the aerial image, resist pattern profile, and the process latitude with the optimized process parameters.
URI
https://www.spiedigitallibrary.org/conference-proceedings-of-spie/6151/61510V/EUV-lithography-simulation-for-the-32nm-node/10.1117/12.656335.fullhttp://repository.hanyang.ac.kr/handle/20.500.11754/107663
ISSN
0277-786X
DOI
10.1117/12.656335
Appears in Collections:
COLLEGE OF SCIENCE AND CONVERGENCE TECHNOLOGY[E](과학기술융합대학) > APPLIED PHYSICS(응용물리학과) > Articles
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