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dc.contributor.author노정진-
dc.date.accessioned2019-05-20T02:30:11Z-
dc.date.available2019-05-20T02:30:11Z-
dc.date.issued2008-06-
dc.identifier.citation대한전자공학회 2008년 하계종합학술대회, Page. 476-477en_US
dc.identifier.urihttp://www.dbpia.co.kr/Journal/ArticleDetail/NODE01017105-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/104656-
dc.description.abstractIn this paper, high voltage DC- DC boost converters by stacked structure of power transistors are proposed. These stacked power transistors are tolerant to output voltage higher than the process limit for individual CMOS transistors. The proposed circuits were designed in a standard 3.6V, 0.13㎛.en_US
dc.language.isoko_KRen_US
dc.publisher대한전자공학회en_US
dc.title고전압 발생을 위한 스택 구조의 DC-DC boost 변환기en_US
dc.title.alternativeHigh voltage DC - DC boost converter by stacked structureen_US
dc.typeArticleen_US
dc.contributor.googleauthor김영재-
dc.contributor.googleauthor남현석-
dc.contributor.googleauthor안영국-
dc.contributor.googleauthor노정진-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidjroh-
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COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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