Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 김희준 | - |
dc.date.accessioned | 2019-05-20T02:24:22Z | - |
dc.date.available | 2019-05-20T02:24:22Z | - |
dc.date.issued | 2008-06 | - |
dc.identifier.citation | 대한전자공학회 2008년 하계종합학술대회, Page. 1069-1070 | en_US |
dc.identifier.uri | http://www.dbpia.co.kr/Journal/ArticleDetail/NODE01017399 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/104645 | - |
dc.description.abstract | This paper presents a high efficient two-stage interleaved synchronous buck CMOS DC-DC converter. The proposed circuit has a fixed duty cycle as 0.5 by an added buck converter. And it causes the best ripple cancelation of the output current ripple. The proposed circuit was simulated by HSPICE with a standard CMOS 0.35㎛ process parameter. | en_US |
dc.language.iso | ko_KR | en_US |
dc.publisher | 대한전자공학회 | en_US |
dc.title | 고효율 2단 인터리브 동기정류형 벅 컨버터 | en_US |
dc.title.alternative | A High Efficient, Two-Stage Interleaved Synchronous Buck CMOS DC-DC Converter | en_US |
dc.type | Article | en_US |
dc.contributor.googleauthor | 박종하 | - |
dc.contributor.googleauthor | 김훈 | - |
dc.contributor.googleauthor | 김희준 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | hjkim | - |
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