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dc.contributor.author어영선-
dc.date.accessioned2019-05-13T01:18:20Z-
dc.date.available2019-05-13T01:18:20Z-
dc.date.issued2009-04-
dc.identifier.citationConference Proceedingsen_US
dc.identifier.urihttps://www.semanticscholar.org/paper/High-Frequency-Characterization-and-Circuit-of-Via-Kim-Eo/13f8a0be9c34b320001b004d52a0419a3d75f28a?tab=abstract-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/103909-
dc.description.abstractA via is experimentally characterized by using highfrequency s-parameter measurements. Test patterns are designed and fabricated by using a package process. They are measured by using VNA (vector network analyzer) up to 25GHz. The parasitic effects due to access lines for on-wafer probing are deembedded. Then modeling the via as two equivalent circuits (Ttype and Pi-type), the circuit model parameters are determined. It is shown that the T-type circuit model has excellent agreement with the measured s-parameters.en_US
dc.language.isoen_USen_US
dc.publisherGSMMen_US
dc.subjects-parameteren_US
dc.subjectde-embeddingen_US
dc.subjectcircuit modelen_US
dc.titleHigh-Frequency Characterization and Circuit Modeling of Via in Multi-Layered IC Packageen_US
dc.typeArticleen_US
dc.contributor.googleauthorKim, Hyewon-
dc.contributor.googleauthorEo, Yungseon-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pideo-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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