Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 권병일 | - |
dc.date.accessioned | 2019-04-04T07:27:54Z | - |
dc.date.available | 2019-04-04T07:27:54Z | - |
dc.date.issued | 2015-09 | - |
dc.identifier.citation | 2015 International Conference on Electrical Drives and Power Electronics (EDPE), Page. 76-81 | en_US |
dc.identifier.isbn | 978-1-4673-7376-0 | - |
dc.identifier.issn | 1339-3944 | - |
dc.identifier.uri | http://ieeexplore.ieee.org/document/7325273/ | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/101504 | - |
dc.description.abstract | This paper proposes a novel design method for current limiting resistors and DC bus contactor of inverters, in which the limiting current circuit is accurately obtained based on the model of power electronics system. The mathematical model of the rectifier under different bus voltages is established and the relationship between current limiting resistance and power-on time discussed. The dichotomy is utilized to calculate the current limiting resistance of the inverter, and also the losses calculation with considering the maximum start current instantaneous power that the system current limiting resistance can stand. Meanwhile, the calculation method of DC bus contactor considering under-load, over-load and current derating is proposed. The design method of the current limiting resistance and losses is presented. The effectiveness of the proposed method is verified by simulation. | en_US |
dc.description.sponsorship | This research was jointly supported by the BK21PLUS program through the National Research Foundation of Korea funded by the Ministry of Education, and the Human Resources Program in Energy Technology of the Korea Institute of Energy Technology Evaluation and Planning (KETEP), granted financial resource from the Ministry of Trade, Industry and Energy, Republic of Korea (20154030200730). | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IEEE | en_US |
dc.subject | Resistors | en_US |
dc.subject | Limiting | en_US |
dc.subject | Velocity control | en_US |
dc.subject | Inverters | en_US |
dc.subject | Resistance | en_US |
dc.subject | Capacitors | en_US |
dc.subject | current limiting circuit | en_US |
dc.subject | dichotomy | en_US |
dc.subject | calculate | en_US |
dc.subject | losses | en_US |
dc.title | A Novel Design Method for Current Limiting Circuit of Inverter | en_US |
dc.type | Article | en_US |
dc.relation.volume | 2015 | - |
dc.identifier.doi | 10.1109/EDPE.2015.7325273 | - |
dc.relation.page | 76-81 | - |
dc.contributor.googleauthor | Chen, Dezhi | - |
dc.contributor.googleauthor | Bai, Baodong | - |
dc.contributor.googleauthor | Kwon, Byung-il | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | bikwon | - |
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