A study on forming-free characteristic and enhanced endurance of nanoscale copper-oxide solid-electrolyte-based Conductive-bridging-random access-memory cell
- A study on forming-free characteristic and enhanced endurance of nanoscale copper-oxide solid-electrolyte-based Conductive-bridging-random access-memory cell
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- Recently, Conductive-bridge random access memory (CBRAM) cell is considered as a promising candidate for terabit-level non-volatile memory due to its many advantages such as minimum 4F2 memory cell size, large memory margin of more than 102, and fast write/erase speed of less than several hundred nanoseconds (ns) . In particular, the CBRAM cell has been demonstrated as a good non-volatile memory performance such as 10 years retention time and 106 write/erase endurance cycles [2,3]. Particularly widespread research attention has been received by transition metal oxide (TMO)-based ReRAMs, which are classified by oxygen-vacancy-filament [3-8] or interface-type [7-12]. Although TMO-based ReRAMs have demonstrated good non volatile memory cell performance characteristics such as 10 years retention time, 106 write/erase endurance cycles, and ~100 ns writing speed [13,14], the overall performance has shown a strong dependency on memory cell size
i.e., it rapidly degrades when the memory cell size is decreased [15-18]. Thus, conductive bridging random access memory (CBRAM) has been considered as an alternative to TMO based ReRAM due to its independence of memory cell size [19, 20]. A CBRAM cell with a top metal electrode/ solid or polymer electrolyte/ bottom inert metal electrode structure is operated by switching nanoscale metal filaments in the solid or polymer electrolyte [21, 22]. The materials used for top electrodes supplying metal ions to form metal filaments have been Cu [23-28], CuTe , and Ag [21, 30-32]. The electrolyte materials that have been used are Al2O3 [23, 25, 29], a-Si [30, 31], Ag-Ge-S , Cu2S [25, 26], TaOx , and polymer [27, 32]. The materials used for inert bottom electrodes not supplying metal ions have been Pt [21, 25, 26] and TiN . Thus, A CBRAM cell with a structure of reactive electrode / solid-electrolyte / inert electrode operates through the diffusion and drift of metal ions within the solid electrolyte following the reduction process [4-11]. The most common materials used for reactive electrodes are Ag and Cu due to their high diffusivity in solid-electrolyte [12-17]. However, for achieving commercial-level non-volatile memory cell, the CBRAM cell with Ag or Cu electrode has some limitations such as poor stability and reliability due to excessive diffusion of Ag and Cu ions in solid-electrolyte . Thus, this excessive diffusion of Ag and Cu ions leads to random formation of multiple thick filaments resulting in a fast degradation of write/erase endurance cycles. This issue could be improved by controlling the amount of metal ions diffusing into the solid-electrolyte via inserting a diffusion barrier between the solid-electrolyte and reactive electrode. In our study, it is important to mention that our device showed a very interesting forming free characteristic that it needs no high-voltage formation cycle compared to other conventional CBRAM devices. And we developed a structure of CBRAM cell implemented with TiN liner for enhancing its reliability. This characteristic reflects the low power consumption and high reliability of our CBRAM device. In the other words, the set voltages of the first cycle and other following cycles in I−V measurement were quite similar. Also CuO solid-electrolyte-based CBRAM cells implemented with 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as ~106 AC write/erase endurance cycles with 100-μs AC pulse width and long retention time of ~7.353 years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of Ag filaments in the electrolyte can be effectively controlled through tuning the thickness of TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.
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- GRADUATE SCHOOL[S](대학원) > NANOSCALE SEMICONDUCTOR ENGINEERING(나노반도체공학과) > Theses (Ph.D.)
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