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Ultra Low Power and High Speed FPGA Design with CNFET

Title
Ultra Low Power and High Speed FPGA Design with CNFET
Author
정기석
Keywords
CNTFETs; Table lookup; Field programmable gate arrays; Power demand; MOSFET circuits; Semiconductor device modeling; Carbon nanotubes
Issue Date
2012-10
Publisher
IEEE
Citation
2012 International Symposium on Communications and Information Technologies (ISCIT) Communications and Information Technologies (ISCIT), P.828-833
Abstract
Both the capacity and the complexity of modern FPGA devices increase rapidly. Also, it is common that battery-powered embedded systems are equipped with FPGA devices. Therefore, reducing the power consumption of FPGA devices has become a very crucial issue. Not only dynamic power consumption but also leakage power consumption increases as the feature size to manufacture FPGA devices shrinks. To reduce the power consumption of FPGA devices, carbon-nanotube field effect transistor (CNFET) has emerged as a promising candidate for replacing silicon metal oxide semiconductor field effect transistor (Si-MOSFET). In this paper, we propose an FPGA slice design based on CNFET technology, and compare the performance and the power consumption characteristics of the proposed design with the same design based on Si-MOSFET. From the performance evaluation, we learned that the proposed design showed up to 5000 times better power-delay product (PDP) than the Si-MOSFET design. Especially reduction in power consumption was truly significant.
URI
https://ieeexplore.ieee.org/abstract/document/6381016/http://hdl.handle.net/20.500.11754/67850
ISSN
1318-7627
DOI
10.1109/ISCIT.2012.6381016
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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