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A Novel Decimal Logarithmic Converter Based on First-Order Polynomial Approximation

Title
A Novel Decimal Logarithmic Converter Based on First-Order Polynomial Approximation
Author
Seokbum Ko
Keywords
Decimal computer arithmetic; Decimal logarithmic converter; First-order polynomial approximation; FPGA
Issue Date
2012-05
Publisher
Springer Science + Business Media
Citation
Circuits, Systems, and Signal Processing, Vol.31, No.3 [2012], p1179–1190
Abstract
This paper presents a decimal logarithmic converter based on the decimal first-order polynomial (linear) approximation algorithm. The proposed approach is mainly based on a look-up table, followed a decimal linear approximation step. Compared with a binary-based decimal linear approximation algorithm (Algorithm 1), the proposed algorithm (Algorithm 2) is error-free in the conversion between the decimal and the binary formats. The proposed architecture is implemented by the combinational logic in the binary coded decimal (BCD) encoding on Virtex5 XC5VLX110T FPGA. The results of the comparison show that the hardware performance of Algorithm 2 can run 2.15 times faster than Algorithm 1, with the expense of 1.14 times more area.
URI
http://link.springer.com/article/10.1007%2Fs00034-011-9365-yhttp://hdl.handle.net/20.500.11754/67058
ISSN
0278-081X
DOI
10.1007/s00034-011-9365-y
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > COMPUTER SCIENCE(컴퓨터소프트웨어학부) > Articles
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