Low-Power Design of Hardware One-Time Password Generators for Card-Type OTPs
- Title
- Low-Power Design of Hardware One-Time Password Generators for Card-Type OTPs
- Author
- 김동규
- Keywords
- One-time password; AES; HMAC; cardtype OTP; low-power hardware implementation
- Issue Date
- 2011-08
- Publisher
- Electronics and Telecommunications Research Institute
- Citation
- ETRI Journal, 2011, 33(4), P.611-620
- Abstract
- Since card-type one-time password (OTP) generators became available, power and area consumption has been one of the main issues of hardware OTPs. Because relatively smaller batteries and smaller chip areas are available for this type of OTP compared to existing token-type OTPs, it is necessary to implement power-efficient and compact dedicated OTP hardware modules. In this paper, we design and implement a low-power small-area hardware OTP generator based on the Advanced Encryption Standard (AES). First, we implement a prototype AES hardware module using a 350 nm process to verify the effectiveness of our optimization techniques for the SubBytes transform and data storage. Next, we apply the optimized AES to a real-world OTP hardware module which is implemented using a 180 nm process. Our experimental results show the power consumption of our OTP module using the new AES implementation is only 49.4% and 15.0% of those of an HOTP and software-based OTP, respectively.
- URI
- https://onlinelibrary.wiley.com/doi/abs/10.4218/etrij.11.0110.0392http://hdl.handle.net/20.500.11754/66822
- ISSN
- 1225-6463
- DOI
- 10.4218/etrij.11.0110.0392
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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