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dc.contributor.author정기석-
dc.date.accessioned2018-03-26T00:24:30Z-
dc.date.available2018-03-26T00:24:30Z-
dc.date.issued2014-04-
dc.identifier.citationIEEE COMPUTER ARCHITECTURE LETTERS, 2014, 14(1), p66-p69en_US
dc.identifier.issn1556-6056-
dc.identifier.urihttp://ieeexplore.ieee.org/abstract/document/6808482/-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/52023-
dc.description.abstractDynamic voltage and frequency scaling (DVFS) is a key technique for reducing processor power consumption in mobile devices. In recent years, mobile system-on-chips (SoCs) has supported DVFS for embedded graphics processing units (GPUs) as the processing power of embedded GPUs has been increasing steadlily. The major challenge of applying DVFS to a processing unit is to meet the quality of service (QoS) requirement while achieving a reasonable power reduction. In the case of GPUs, the QoS requirement can be specified as the frame-per-second (FPS) which the target GPU should achieve. The proposed DVFS technique ensures a consistent GPU performance by scaling the operating clock frequency in a way that it maintains a uniform FPS.en_US
dc.language.isoenen_US
dc.publisherIEEE COMPUTER SOCen_US
dc.subjectGraphics processorsen_US
dc.subjecthardware/software interfacesen_US
dc.subjectlow-power designen_US
dc.subjectenergy-aware systemsen_US
dc.titleQuality of service-aware dynamic voltage and frequency scaling for embedded GPUsen_US
dc.typeArticleen_US
dc.relation.no12-
dc.relation.volume2013-
dc.identifier.doi10.1109/LCA.2014.2319079-
dc.relation.page87-90-
dc.relation.journalIEEE COMPUTER ARCHITECTURE LETTERS-
dc.contributor.googleauthorYou, Daecheol-
dc.contributor.googleauthorChung, Ki-Seok-
dc.relation.code2014030692-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidkchung-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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