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A Novel Load Mismatch Detection and Correction Technique for 3G/4G Load Insensitive Power Amplifier Application

Title
A Novel Load Mismatch Detection and Correction Technique for 3G/4G Load Insensitive Power Amplifier Application
Author
김정현
Keywords
Antenna mismatch; efficiency enhancement; HBT power amplifier (PA); linearity enhancement; load insensitive mismatch correction; silicon-on-insulator (SOI) field-effect transistor (FET) impedance mismatch detector; tunable output matching network (TOMN); LINEARITY; SWITCHES
Issue Date
2015-05
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v. 63, No. 5, Page. 1530-1543
Abstract
This paper proposes a novel load mismatch detection and correction technique to develop a load insensitive power amplifier (PA). The presented algorithm for the technique can simply be implemented by handling load impedance as a region rather than a point. Based on the detection results, a tunable output matching network (TOMN) corrects a mismatched load and transforms it into a desired region, thereby dramatically enhancing PA performances under load mismatched condition with a minimal compromising at a matched load. The detectors and TOMN were simply implemented using a 0.18-mu m silicon-on-insulator field-effect transistor, which were integrated with a 2-mu m InGaP/GaAs HBT PA monolithic microwave integrated circuit into a single module. A PA module was implemented using more advanced impedance detectors having eight-phase regions, which was measured with WCDMA R'99 and 10-MHz 16QAM long-term evolution signals centered at 1.95 GHz for verification of the proposed idea. When compared to a conventional PA, excellent adjacent channel leakage ratio improvements of 12.7 and 8.3 dB, respectively, were achieved under output voltage standing-wave ratio (VSWR) of 2.5:1 for both applications. Moreover, the idea was extended for efficiency enhancement in a linearity spec-compliant impedance region, and the PA showed power-added efficiency improvements of 1.6% and 0.5%, respectively, under output VSWR of 2.5: 1 for both applications.
URI
http://ieeexplore.ieee.org/abstract/document/7086093/http://hdl.handle.net/20.500.11754/36302
ISSN
0018-9480; 1557-9670
DOI
10.1109/TMTT.2015.2417862
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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