89 0

A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors

Title
A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors
Author
권오경
Keywords
shift register; buffer; gate driver; p-type TFTs; LTPS TFTs ,single clock
Issue Date
2011-04
Citation
Journal of Information Display , 2011, 12(1), P.61-67
Abstract
A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.
URI
https://www.tandfonline.com/doi/abs/10.1080/15980316.2011.555515
ISSN
1598-0316; 2158-1606
DOI
10.1080/15980316.2011.555515
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE