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Design of Pre-Processor for Effective Analysis of eMMC Protocol

Title
Design of Pre-Processor for Effective Analysis of eMMC Protocol
Author
송용호
Keywords
eMMC; Protocol Analyzer; Pre-processing
Issue Date
2016-01
Publisher
IEEK/IEEE
Citation
International Conference on Electronics, Information, and Communications, ICEIC 2016, Article number 7563022, Page. 318-321
Abstract
As mobile devices such as smartphones, tablets, etc. employ large NAND storage with high performance interface, the data traffic from/to the storage increases significantly and interface protocol becomes complicated as well. The increase in data traffic and protocol complexity makes it difficult the complete analysis of device accesses and responses. In this paper, we present a pre-processor that could be used to identity the eMMC operations at the interface level. This processor is able to recognize operation types, interface channel configuration and additionally operation durations for thorough analysis. The processor is implemented on an FPGA platform and its operation is verified using a full-featured mobile device.
URI
http://ieeexplore.ieee.org/document/7563022/http://hdl.handle.net/20.500.11754/30386
ISBN
978-1-4673-8016-4
DOI
10.1109/ELINFOCOM.2016.7563022
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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