343 0

Multiprocessor MMIO Tracing via Memory Protection and a Shadow Page Table

Title
Multiprocessor MMIO Tracing via Memory Protection and a Shadow Page Table
Author
유민수
Keywords
Memory Mapped I/O (MMIO) Trace; Memory Protection; Page Fault; Shadow Page Table
Issue Date
2015-07
Publisher
CSREA Press
Citation
Int'l Conf. Foundations of Computer Science, FCS'15, Page. 16-18
Abstract
Memory-mapped I/O (MMIO) tracing provides an effective means for analyzing and debugging I/O related functions since it allows us to observe and track the interplay between processors and I/O devices [1]. However, existing MMIO tracing techniques have a serious drawback in multicore systems. Current MMIO techniques commonly use a memory protection mechanism to detect access to an MMIO address area under consideration. Unfortunately, this approach may miss some I/O events and even lead to a data race condition due to inappropriate management of concurrent accesses to the MMIO address area. In this paper, we describe a novel MMIO tracing approach introducing the notion of shadow page table. We use a shadow page table to allow only one processor to have access to a MMIO address area while forbidding other processors’ access to the same MMIO address area. We show how the shadow page table approach can be efficiently implemented on a multiprocessor platform with dual core ARM Cortex A15 CPU.
URI
http://worldcomp-proceedings.com/proc/p2015/FCS3264.pdfhttp://hdl.handle.net/20.500.11754/26044
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > COMPUTER SCIENCE AND ENGINEERING(컴퓨터공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE