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Area efficient floating-point FFT butterfly architectures based on multi-operand adders

Title
Area efficient floating-point FFT butterfly architectures based on multi-operand adders
Author
Seokbum Ko
Keywords
Combinatorial mathematics; Digital arithmetic methods; Microprocessor chips; Logic and switching circuits; Microprocessors and microcomputers; Logic circuits; Integral transforms; Integral transforms; Combinatorial mathematics
Issue Date
2015-06
Publisher
INST ENGINEERING TECHNOLOGY-IET
Citation
ELECTRONICS LETTERS, v. 51, NO 12, Page. 895-895
Abstract
Hardware implementation of the fast Fourier transform (FFT) function consists of multiple consecutive arithmetic operations over complex numbers. Applying floating-point arithmetic to FFT coprocessors leads to a wider dynamic range and allows the coprocessor to collaborate with general purpose processors via the standard floating-point arithmetic. This offloads compute-intensive tasks from the primary processor and overcomes floating-point concerns such as scaling and overflow/underflow detection. The downside, however, is that floating-point units are slower than the fixed-point counterparts. One of the popular ways to improve the speed of floating-point FFT units is to merge the arithmetic operations inside the butterfly units of a FFT architecture. This leads to a butterfly architecture based on multioperand adders. Butterfly units are designed, in two of the most recent works, using three-operand and four-operand adders. However, the work reported here by the present authors goes further and a butterfly architecture based on a five-operand adder is proposed. Simulation results demonstrate that the proposed butterfly architecture is 50% smaller than the fastest previous work with about 17% latency overhead. Compared with the smallest previous work, the proposed design is 47% smaller and 8% faster.
URI
http://ieeexplore.ieee.org/document/7122465/?arnumber=7122465http://hdl.handle.net/20.500.11754/25613
ISSN
0013-5194; 1350-911X
DOI
10.1049/el.2015.0342
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > COMPUTER SCIENCE AND ENGINEERING(컴퓨터공학부) > Articles
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