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Unveiling Interface and Bulk Defects Beyond Stability Limits in ALD-IGZO FETs for Emerging Semiconductor Applications Dong-Gyu Kim

Unveiling Interface and Bulk Defects Beyond Stability Limits in ALD-IGZO FETs for Emerging Semiconductor Applications Dong-Gyu Kim
Alternative Author(s)
Dong-Gyu Kim
Jin-Seong Park
Issue Date
2024. 2
한양대학교 대학원
Achieving low power consumption and scalability is imperative in the semiconductor industry. Despite the widespread use of silicon-based metal-oxide-semiconductor field-effect transistors, they exhibit inherent high leakage currents, resulting in elevated power consumption. Among the promising candidates, amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) offer favorable characteristics such as high field-effect mobility (μFE), steep subthreshold swing (SS), and exceptionally low leakage current. Moreover, a-IGZO TFTs fabricated by the atomic layer deposition (ALD) process, known for exceptional step-coverage characteristics, exhibit strong compatibility with high-density devices like channel-all-around (CAA), vertical channel, and monolithic 3D configurations. However, stability is the most concerning electrical characteristic in the ALD-IGZO TFTs. The origins of the inferior stability are closely related to charge trapping or injection in various regions, including the active layer bulk, the gate insulator (GI) bulk, and the interface between the active layer and the GI. Therefore, precision in each factor is crucial to surpass the stability limits of ALD-IGZO TFTs for various semiconductor applications. This thesis discusses the influence of controlling the three key parameters that affect reliability in ALD-IGZO TFTs for emerging semiconductor applications. Although there have been several reports on the impact of each parameter on device stability through the sputtering process, the specific effects of a novel ALD process have yet to be clearly reported. The evaluated ALD-IGZO TFTs were fabricated with top-gate bottom-contact (TG-BC) structures. In addition, the IGZO active layer was deposited using a plasma-enhanced ALD (PE-ALD) process at 200℃ employing (3-dimethylaminopropyl) dimethylindium (DADI), trimethylgallium (TMGa), and diethylzinc (DEZ) precursors for In, Ga, and Zn elements, respectively. For the GI, the Al2O3 layer was deposited using a trimethylaluminium (TMA) precursor by PE-ALD and thermal ALD (T-ALD) processes. To understand the influence of the active layer bulk parameter, we deposited PE-ALD-IGZO active layers using nitrous oxide (N2O) plasma reactant to introduce nitrogen (N) into the IGZO. The PE-ALD-IGZO was selectively applied with N2O plasma reactant for each cation based on the oxygen (O2) plasma reactant during the deposition process. Based on the combination of theoretical and experimental results, it is found that the N doping mechanism highly relies on the intrinsic carbon (C) impurities or the nature of the material. Owing to the significant decrease in sub-gap states within the Ga2O3 material through N doping, the selectively N2O plasma applied PE-ALD-IGZO TFTs exhibit enhanced stability under harsh positive bias temperature stress (PBTS) conditions (2 MV/cm and 95℃), showing a 50% enhancement compared to the O2 plasma reactant applied device. This enhanced stability is achieved even with an extremely high μFE of 106.5 cm2/Vs. Next, the GI bulk parameters are investigated through a two-step in-situ ALD process via PE-ALD (O2 plasma) and T-ALD (O3), which exhibit distinct reactivity differences. Here, the interface between the active layer and GI was maintained with a PE-ALD Al2O3 GI layer, while the GI bulk was replaced with T-ALD Al2O3. The optimal device shows excellent electrical characteristics, such as a threshold voltage (VTH) of 0.37 V, μFE of 150.7 cm2/Vs, and SS of 64.0 mV/decade. Moreover, the device exhibits VTH shift changes of -0.43 V after hydrogen (H2) annealing (300℃ and 100% H2 concentration) and 0.00 V regarding PBTS stability (2 MV/cm and 95℃). This result can be attributed to the precise control of H, O, and C species within the hybrid GI, achieved through O2 plasma and O3 reactants. The optimal device was applied to a novel vertical CMOS inverter with a voltage gain of 44.7 V/V and a noise margin of 87.5% at a 10 V supply voltage. Finally, the impact of the interface between the active layer and the GI was evaluated by transitioning from the PE-ALD to the T-ALD process for Al2O3 GI deposition. The device with T-ALD-derived Al2O3 GI shows transfer characteristics even after a high-temperature annealing process of 600℃ for H desorption. However, unavoidable O-related defect generation at the interface due to C impurities within GI during high-temperature annealing leads to abnormal hump characteristics in PBTS stability. The C impurities within the GI were decreased by applying a deposition temperature of 400℃. As a result, the device exhibits a VTH of 0.05 V, μFE of 27.6 cm2/Vs, and SS of 61 mV/decade, demonstrating extremely reliable PBTS and negative bias temperature stress (NBTS) stability. A power-law fit of the VTH shift under harsh PBTS conditions (2 MV/cm and 120℃) predicts a variation of VTH shift of -0.01 V after 10 years. This process ensures large area uniformity over a 4-inch area. Consequently, this thesis describes the control of active layer defects, mobile charge within the GI, and thermally-activated interface defects through the ALD process. Based on understanding how each factor affects device stability, the ALD-IGZO TFTs exhibit extremely high mobility and reliable stability. Therefore, it is expected that oxide semiconductors have sufficient potential as a channel material for emerging semiconductor devices.
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