160 0

A B-tree employing a cascade memory node on NAND flash SSDs

Title
A B-tree employing a cascade memory node on NAND flash SSDs
Author
이동호
Keywords
B-tree; Index Structure; NAND Flash; SSD
Issue Date
2014-01
Publisher
Institute of Electrical and Electronics Engineers Inc.
Citation
13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings, article no. 6914424,
Abstract
A NAND flash SSD has been widely used as a storage device because of its fast access speed and low power consumption. It inherits distinctive features such as no in-place update because it consists of NAND flash arrays. When implementing a B-tree on flash SSDs, the performance degradation occurs due to intensive updates in the same node. In this paper, we propose a B-tree employing a cascade memory node on NAND flash SSDs in order to reduce intensive overwrites. Our B-tree keeps the modified data so as to delay write operations and performs the flushing of memory node in batch process. Through the experiment, we show the superiority of our B-tree compared to related techniques. © 2014 IEEE.
URI
https://ieeexplore.ieee.org/document/6914424https://repository.hanyang.ac.kr/handle/20.500.11754/186060
DOI
10.1109/ELINFOCOM.2014.6914424
Appears in Collections:
ETC[S] > ETC
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE