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dc.contributor.advisor최창환-
dc.contributor.author신예림-
dc.date.accessioned2023-05-11T12:05:11Z-
dc.date.available2023-05-11T12:05:11Z-
dc.date.issued2023. 2-
dc.identifier.urihttp://hanyang.dcollection.net/common/orgView/200000651166en_US
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/180171-
dc.description.abstractExcellent retention characteristics were obtained by forming deep traps in Si3N4, which is the charge trap layer of flash memory. Blocking oxide SiO2 was deposited through low-pressure chemical vapor deposition (LPCVD), charge trap layer Si3N4 was deposited through plasma-enhanced atomic layer deposition (PEALD), and tunneling oxide SiO2 was deposited through thermal oxidation. As a comparison, Si-rich LPCVD Si3N4 was manufactured with the same capacitor, and it was confirmed that the N-rich Si3N4 charge trap layer had better retention characteristics than Si-rich Si3N4. The interface and bulk depth profile and thin film properties were analyzed through XPS, TOF-SIMS, and RBS of Si3N4 according to the PEALD process parameters. Compared to Si-rich Si3N4, N-rich Si3N4 thin film showed improved retention characteristics by having a deep trap. Although smaller than the large memory window due to the large trap density of Si-rich Si3N4, an acceptable memory window and better retention characteristics (104s) were achieved. Therefore, deep trap Si3N4 can be considered as a sufficient support for the charge trap layer as a way to increase the reliability of next-generation vertical-NAND flash memory.-
dc.publisher한양대학교-
dc.titleA Study on Controlling Composition of Si3N4 Thin Film and Forming Deep Trap to Improve Reliability of Flash Memory Devices-
dc.typeTheses-
dc.contributor.googleauthor신예림-
dc.sector.campusS-
dc.sector.daehak대학원-
dc.sector.department신소재공학과-
dc.description.degreeMaster-
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GRADUATE SCHOOL[S](대학원) > MATERIALS SCIENCE & ENGINEERING(신소재공학과) > Theses (Master)
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